"NP-Domino, Ultra-Low-Voltage, High-Speed, Dual-Rail, CMOS NOR Gates"
published by Circuits and Systems, Vol.7 No.8, 2016
has been cited by the following article(s):
Ultra Low Voltage Logic Design For High-Speed Processing
Low leakage domino logic circuit for wide fan-in gates using CNTFET
A 4: 1 Multiplexer using dual chirality CNTFET-based domino logic in nano-scale technology
A 1‐bit full adder using CNFET based dual chirality high speed domino logic