"Dynamic and Leakage Power Estimation in Register Files Using Neural Networks"
Assim A. Sagahyroon,
Jamal A. Abdalla
published by Circuits and Systems, Vol.3 No.2, 2012
has been cited by the following article(s):
RTL to Transistor Level Power Modelling and Estimation Techniques for FPGA and ASIC: A Survey
An Efficient Computer-Aided Design Methodology for FPGA&ASIC High-Level Power Estimation Based on Machine Learning