The Pulse Width Modulation (PWM) is a modulation technique for controlling analog circuits with digital outputs of processing device. Pulse Width Modulation is employed in a wide variety of applications, ranging from measurement and communications to power control and conversion processes in power electronic circuits. By controlling analog circuits digitally system costs and power consumption can be drastically reduced because of the accuracy of the PWM controlled techniques. The average value of voltage fed to the load is controlled by turning the switch between main source and load with ON and OFF at a fast pace. The longer the switch is ON compared to the OFF periods, the maximum the power supplied to the load is. The digital power controller uses analog-to-digital converters (ADC’s) with sample analog power supply variables, such as voltages, currents, and temperature. These quantities are processed by control laws implemented in a fast computational block. The control laws calculate control signals which are converted to switch on/off command sequences by a digital modulator, such as a digital pulse-width modulator (DPWM). An embedded microprocessor or DSP core performs outer-loop functions such as control-law adaptation, efficiency optimization, fault diagnostics, communication with the host system  - .
There are four main conversion processes for power electronics converter in real applications. Among them DC to DC conversion process is a vital role to enhance the high performance and accuracy for controlling the power electronic circuit by using PWM techniques. The controller of the DC-DC converter can be implemented either by analog/digital hardware or by digital software. The control method is determined by utilizing the desired specifications of the system. An analog/digital hardware implementation has the main advantage of rapid response at the output to a change in the line or load due to the continuous sampling and processing. However, digital software implementations increase flexibility while eliminating the dependence on environmental effects and aging, and reducing the amount of external hardware components. Complex control algorithms can also be implemented using digital software controllers in a simpler manner. The controller generates control signals for the Pulse Width Modulation (PWM) block which outputs the gate signals of the controllable semiconductor switch. There are many control techniques for PWM output for those circuits. In this study we mainly focus on the Fuzzy Logic Control for power electronic circuits    .
In this study, we have developed digital pulse width modulation for DC to DC converter based on the analytical calculation and mathematical modeling of the power electronic circuits. The research solution for the problem has been confirmed the targeted design specification with high performance condition in real power electronic circuit. The rest of this paper is organized as follows. Section II presents the Digital Pulse Width Modulator for DC to DC Converter. Section III points out the development of Fuzzy Rules Base for the proposed system based on required target. Section IV mentions the SIMULINK model for the proposed system. Section V discusses on the results and concludes the presentation.
2. Digital Pulse Width Modulator for DC to DC Converter
Pulse Width Modulation controllers are implemented using both analog and digital control schemes. Pulse width modulator produces a logic signal, which is periodic with frequency and has duty cycle. The signal is used to control the duration over which power transistor in the converter are switched on. The input to the digital pulse width modulator is an N-bit digital command word obtained from a DSP/microprocessor unit. The modulator manipulates N-bit digital command word to produce the duty cycle in proportion to it. Figure 1 shows the Analog and Digital Pulse Width Modulation Circuit Diagram.
2.2. Digital PWM Technology
The controller consists of an analog-to-digital converter (ADC), a discrete-time control law, and a digital PWM (DPWM) module. Figure 2 illustrates the Digitally-controlled PWM Buck Converter Circuit Diagram.
3. Design Consideration of DPWM
In this mechanism the charging time period changes with respect to the load. The charging time period corresponds to the switching action of the power converter which is controlled by an external circuitry. The DC voltage across the load is to be maintained at the desired level irrespective of the loading conditions and the changes in the input voltage. The output voltage is monitored using a control circuit and maintained at the desired level using a switching circuitry. The control circuitry manipulates the N-bit A/D output to produce the N-bit duty ratio input for the DPWM. The DPWM accepts the output from the computational unit and generates a square wave with duty ratio (d) at the switching frequency (fs) of the converter. Figure 3 mentions the Block Diagram of Digital PWM Controlled DC-DC Buck Converter.
Digital control of switching power supplies is becoming more and more common in industry today because of the availability of low cost, high performance FLC controller with enhanced and integrated power electronic peripherals such as analog-to-digital (A/D) converters and pulse width modulator (PWM). FLC based digital control allows for the implementation of more functional control schemes, standard control hardware design for multiple platforms and flexibility of quick design modifications to meet specific customer needs. Digital controllers are less susceptible to aging and environmental variations and have better noise immunity.
4. Design of Fuzzy Logic Controller
The fuzzy controller is divided into five modules: fuzzifier, data base, rule base, decision maker, and defuzzifier. The inputs of the fuzzy controller are the error e and the change of error ce, which are defined as:
where Vo is the present output voltage, Vref is the reference output voltage, and subscript k denotes values taken at the beginning of the kth switching cycle. Figure 4 shows the Arrangement of FLC Controller for DPWM Input.
4.1. Rules Base Implementation
One of the key parts in designing the fuzzy controller is its linguistic rules. Knowing the controllable behavior of process is needed for the improvement of these rules, but there is no need for the mathematical model of the process. Hence, the fuzzy rules defined for a converter can also be used for virtually all other inverters. Some controlling rules considered in this paper are shown in Table 1.
Table 1. Rule base for Dc/Dc converter.
Figure 1. Analog and digital pulse width modulation circuit diagram.
Figure 2. Digitally-controlled PWM buck converter circuit diagram.
Figure 3. Block diagram of digital PWM controlled DC-DC buck converter.
Figure 4. Arrangement of FLC controller for DPWM input.
4.2. Calculation of Buck Converter
Figure 5 illustrates the DC to DC Buck Converter Design. The minimum inductance needed for the output can be calculated from the worst case operating condition as follow.
L = 1.905 mH.
The calculation of the output ﬁlter capacitor is the same for both the forward-mode and buck-mode DC-DC converter. If ripple-sensitive circuits are on a particular output, the design should consider the addition of a DC ﬁlter stage following the output ﬁlter capacitor. The value for the output capacitor is determined by the following equation.
C == 30 mF.
Figure 6 implements the Digital Pulse Width Modulation Circuit Diagram with SIMULINK Model. It includes behavioral models of all controller blocks and the power stage. The performance analysis of design DPWM controller for buck converter is tested under the no load condition and load changes condition based on various kinds of inputs level.
5.1. Test on Normal Load Condition
The performance of designed DC/DC DPWM converter is formerly determined for normal operation condition. The input voltage is given at 50 V and the reference value is set at 20 V. The filter inductance and capacitance are set as 1.905 mH and 30 mF, and the fuzzy logic controller is also arranged as described in previous chapter. The input and output voltages under normal operation condition is shown in Figure 7.
The load voltage and current waveform under normal operation condition is described in Figure 8. The characteristic of load voltage is as mentioned before. The load current is about 50 A as the calculated value. The switching on transient can also be observed at the starting. Since the load is purely resistive, the transient characteristic of load current is the same as that of load voltage except the different in magnitude.
Figure 5. DC to DC buck converter design.
Figure 6. Digital pulse width modulation circuit diagram with SIMULINK model.
Figure 7. Input voltage and output voltage under normal condition.
Figure 8. Output voltage and output current under normal condition.
5.2. Test on Changes Load Condition
The load variation is the common problem that must be encountered in power converter design. The good power converter must provide the defined voltage at all load variation after a short transition period. Thus, the operation performance of the designed DPWM converter is tested with load variation environment. For the operation of DC/DC PWM converter under load variation, the next 0.8 Ω resistor which is correspond to 500 W at 20 V level is connected in parallel with the existing resister at 0.12 second. Thus the designed DPWM is supplying rated load between 0 and 0.12 second and 150% of rated load (50% overloads) between 0.12 second and 0.3 second. The resulting input-output voltages, output voltage-current and load voltage-current variation are described in Figure 9 and Figure 10.
As shown in Figure 10, the load current increase with the switching of the load while the load voltage kept constant at 20 V under all load condition. A small voltage variation can be observed at the load transition periods due to the energy storage elements (inductor and capacitor). But the voltage transient magnitude is less than 3 V and transient duration is less than 0.1 second. Therefore the designed Digital PWM converter can withstand the load variation with acceptable error.
5.3. Test on Changing Input Voltage Level
The power electronics converter must have ability to supply the define voltage even under input voltage variation. To execute the performance of DPWM converter under input voltage variation, the input voltage is increased from 50 V to 55 V at 0.12 second and the resulting output voltage are measured. The resulting input-output voltages, output voltage-current and load voltage-current variation are described in Figure 11.
As shown in Figure 12, the digital PWM converter can provide constant 20 V output while the input voltage is changing from 50 V to 55 V at 0.12 second. Therefore the designed digital PWM converter is also withstand to input voltage variation. Thus the digital PWM for buck converter is also adapted to input voltage changes.
Figure 9. Input voltage and output voltage under load variation condition.
Figure 10. Output voltage and current under load variation condition.
Figure 11. Output voltage and input voltage under changing input voltage level.
Figure 12. Output voltage and current under changing input voltage level.
The design of a digital PWM controller for DC/DC buck converters is implemented in this work. The fuzzy logic control is evaluated by computer simulations of the closed-loop performance of simple DC/DC converters in respect of load regulation and input voltage variation with Rules Base Technique. The control of the DC/DC buck converters is derived by digital PWM. The FLC system is applied for digital PWM control of DC/DC converter. The developed scheme could be provided higher robustness, flexibility and reliability. The digital PWM control technique is investigated and the results that are developed from this research confirm the high performance condition of the power electronic circuit design.
The author would like to thank many colleagues from the Semiconductor Electronics Research Group under the Department of Electronic Engineering of Yangon Technological University for completing this work. This work is partially supported by Government Research Funds Grant No of GB/D(4)/2019/1.
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