Current daily developing technology tended to complicate power network more and more complicated. In addition to its complexity, the power supply reliability is becoming an indispensable part of low power designs.
IR drop on the supply network becomes worse due to reduction of the interconnect widths, which initiate wire resistance increase. The IR drop directly makes noise on the power network. This is becoming a crucial part of the circuit design process since cross dependency of different nodes of power network block depends upon the voltage within the power distribution network  .
To achieve this requirement, several methodologies have been used.
The most popular methodology is DC analysis over the power network. The transient analysis differs from DC analysis by taking into acount of reactive elements impedance existence. This paper represented only IR drop estimation for static power consumption.
Full power grid example can be described by Figure 1.
The wire length has been represented as combination of resistor, capacitance and induction. The reverse biased current and current drown by logic gates have been described by current sources.
To model DC analysis problem, we need to solve the following formula.
where G is the matrix with resistors, X is a vector of nodes voltage, and V is in depended sources. To solve this problem, we have created an algorithm implementation based on random walk combined with Monte Carlo for small units and accumulated total IR drop .
2. Random Walk
The power grid is optimized to minimize the IR drop at the central part of the power grid in . In , the whole power grid is divided into a small part where each part is analyzed separately. Random walk techniques are used to analyze a power grid in  to iteratively solve the IR drop problem without computing influence of full power network in the certain node. In   , the power supply network is analyzed without computing large matrix operations.
This algorithm is based on statistic problem solving. Basic explanation of the random walk can be as replacement of resistance of the network part with its probability of usage of that exact net.
Random walk is an algorithm which can be used for high speed extraction in power supply network. Basic
Random walk is a great method for calculation of power consumption on infinite node number network.
Figure 1. Power grid example.
Here Vx is the voltage of the cross section. Ix is the current that is passing through the node and ri (i = 1, 2, 3, 4) is resistance of neighbor resistors.
Thus, applying Kirchhoff’s current and voltage laws we can have following equation:
From this equation, to get Vx, we are having below equation:
Let’s make following assignment:
3-th assignment brings the network supply problem to simple statistical problem. Which can be solved by random walk methodology.
Let’s assume we have a gold digger which is starting walking from any position. He is spending money every time he is passing through the cross-nodes and getting some amount of money after he gets to a fixed gold location. The probability of passing through the exact road from a node to another node is px,k, where x is current node id, and k is the number of roads to other nodes.
As from the theory of probability, the sum of probabilities of roads is equal to 1, hence we are getting below equation:
For walk gain, the function can be represented as below:
[earned − spent]
If the walker goes to the gold position, he will get paid by gold, let’s assign the gold price as A0.
In other words, gain function for whole non-gold position can be written as below:
If we assume that A0 is the supply power value (VDD), and F(x) is the voltage on x node, problem of random walker and supply network voltage problem are becoming similar.
For power supply network, we are losing voltage because of drop any time we are passing through a cross-net and gaining power after getting to VDD pad.
Simple circuit example is given in Figure 2.
For basic formulation with the upper described random walker and money spend/gain method, the circuit will obtain the view of Figure 3.
Figure 2. Circuit example.
Figure 3. Spent/gained model chart.
3. Random Walk Implementation
The described algorithm has been implemented with two steps. First step is implementing one random walk for selected node, second step is applying Monte Carlo simulation methodology on result to increase estimation accuracy.
Visualization of algorithm for random walk for selected node is described in Figure 4.
The block diagram Figure 4 can be easily described by following steps.
1) Reading already existing resistance, capacitance, drawing current and power supply data.
2) Starts 2 parallel processes
• Probability extraction based on resistance value.
• Voltage drop calculation for each node.
3) Starting to walk from random node (except supply nodes) to random selected node based on probability.
4) Accumulating consumed current.
5) Repeating 3-th step until reaching to supply node.
6) From supply voltage subtracting calculated drop.
The above-mentioned methodology has been used in the wrapper level for calculating whole network IR drop as in Figure 5.
The block diagram Figure 5 can be easily described by following steps.
Figure 4. Visualization of algorithm for random walk for selected node.
Figure 5. Wrapper level for calculating whole network IR drop.
1) From schematic connectivity description net list parsing resistance, capacitance, drawing current and power supply data.
2) Iterating N times where N is Monte Carlo simulation count.
3) While iterating calculation and combining is being done for current node IR drop.
4) Combined data is being divided by N.
Above mentioned diagram returns IR drop only for one node. To get full IR drop we need to loop through all nodes.
In this paper random walk theory-based IR drop calculation engine is implemented. Engine is taking power/ground mesh parasitic characterization netlist as an input and returns voltage drop value for one node.
This kind of calculation of IR drop is becoming very beneficial for infinite power mesh.
Described algorithm in this paper is 3.2% faster and 1.3% less accurate for big power meshes compared with algorithm described in . For small meshes, accuracy is the same compared with , speed of algorithm  is 1.3% faster. Comparison is done for 2.5 K (small mesh) and 1 M (big mesh) circuit size (node count).
For comparison with , algorithm described in this paper is slower 47.2% and accurate than  9.5%. These values are similar for big and small meshes, correspondingly 2.3 M and 2.5 K circuit size.
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