Quadrature sinusoidal oscillators (QSOs) are important blocks in the synthesis of modern transceivers. A QSO provides two sinusoids with a 90˚ phase difference. QSOs are useful in telecommunications for quadrature mixers and single sideband generators  , in direct-conversion receivers, used for measurement purposes in vector generators and selective voltmeters  . Because of these applications number of QSOs has been realized employing different active building blocks in the open literature  -  . VD-DIBA is one of the active building blocks among the various active building blocks introduced in reference  which is emerging as a very flexible and versatile building block for analog signal processing/signal generation and has been used earlier for realizing a number of functions. VD-DIBA has been used in single resistance controlled oscillators, simulation of inductors, realization of active filters  -  . Recently VD-DIBA has also been used in the realization of QSO where independent electronic control of CO and FO is not available  . Therefore, the purpose of this paper is to propose a new QSO having electronic control of both CO and FO by separate transconductance of the VD-DIBAs. This property is very attractive for realizing current controlled oscillators as FO can be controlled independently without disturbing CO, whereas the flexibility of being able to adjust CO independently is useful in amplitude stabilization. The proposed configuration also offers low active and passive sensitivities. The validity of proposed structure has been confirmed by SPICE simulation with 0.35 µm MIETEC technology.
2. The Proposed New Oscillator Configuration
The symbolic notation and the equivalent circuit model of the VD-DIBA are shown in Figure 1(a) and Figure 1(b) respectively. The circuit model includes two controlled sources: the voltage source controlled by differential voltage with the unity voltage gain and the current source controlled by differential voltage , with the transconductance . The corresponding voltage-current relationship of input-output terminals of VD-DIBA can be expressed by the following matrix:
A straight forward circuit analysis of the circuit of Figure 2 yields the following characteristic equation (CE):
CE: . (2)
From Equation (2), the CO and FO are given by
Figure 1. (a) Symbolic notation of; and (b) Equivalent circuit model of VD-DIBA.
Figure 2.Proposed electronically controllable quadrature sinusoidal oscillator.
Thus from Equations (3) and (4), it is clear that CO is electronically controllable by the transconductance gm2, whereas FO is electronically controllable through the transconductance gm1. Therefore both CO and FO are independently controllable by two separate transconductance of VD-DIBAs.
3. Non-Ideal Analysis and Sensitivity Performance
Considering and as parasitic resistance and parasitic capacitance respectively of the Z-terminal of the VD-DIBA, taking the non-idealities into account, namely the voltage of W-terminal where β+ = 1 − εp (εp = 1) and β− = 1 − εn (εn = 1) denote the voltage tracking errors of Z-terminal and V-terminal of the VD-DIBA respectively, then the expressions for CE, CO and FO can be given as:
The passive and active sensitivities can be expressed as:
, , (8a)
In the ideal case, the various sensitivities of ω0 with respect to C1, C2, R0, Cz, Rz, gm1, gm2 and β+ are found to be
Considering the typical values of various parasitic e.g. Cz = 0.81 pF, Rz = 53 kΩ, β+ = β− = 1 along with gm1 = 310.477 µƱ, gm2 =291.186 µƱ, C1 = C2 = 10 nF, and R0 = 4 kΩ, the various sensitivities are found to be , , , , , , , and which are all quite low.
4. Frequency Stability
Frequency stability is an important figure of merit of an oscillator. The frequency stability factor is defined as , where is the normalized frequency, and represents the phase function of the open loop transfer function of the oscillator circuit. With C1 = C2 = C, R0 = 1/gm2 = 1/g, gm1 = ng, SF for the proposed SECO is found to be:
Thus, the new proposed configuration offers very high frequency stability factor larger values of n.
5. Simulation Results
The proposed QSO was simulated using CMOS VD-DIBA (as shown in Figure 3) to verify its theoretical analysis. The passive elements are selected as R0 = 4 kΩ, and C1 = C2 = 10 nF. The transconductances of VD-DIBAs were controlled by bias voltages VB1, VB2 respectively. The simulated output waveforms for transient response and steady state response are shown in Figure 4 and Figure 5 respectively. These results, thus, confirm the validity of the proposed structure. Figure 6 shows the simulation results of the output spectrum, where the total harmonic distortion (THD) is found to be about 1.9% for both outputs Vo1 and Vo2. The generated waveforms relationship within quadrature circuit has been confirmed by Lissajous pattern shown in Figure 7. The CMOS VD-DIBA is
Figure 3. A CMOS transistor implementation of VD-DIBA, VB2 = VB3 = −0.22 V and VB4 = −0.9 V, VDD = −VSS = 2 V  .
Figure 4. Transient response of proposed QSO.
Figure 5. Steady state response of proposed QSO.
implemented using 0.35 µm MIETEC technology. The transistor model parameters used for CMOS VD-DIBA are listed in Table 1 and aspect ratios (W/L ratios) of the MOSFETs used in Figure 3 are shown in Table 2. Comparisons of previously known quadrature sinusoidal oscillators are Table 3.
In this communication, an electronically tunable voltage-mode quadrature sinusoidal oscillator enabling independent electronic control of frequency of oscillation and condition of oscillation is presented. The proposed QSO circuit employs only two VD-DIBAs, two grounded capacitors and a resistor. The
Figure 6. Frequency response of proposed QSO.
Figure 7. Lissajous pattern of proposed QSO.
Table 1. Transistors process parameters in SPICE simulations.
Table 2. Aspect ratios of CMOS transistors used in Figure 3.
Table 3. Comparison of previously known quadrature sinusoidal oscillators.
proposed QSO is capable of simultaneously providing two explicit quadrature voltage outputs. The condition of oscillation and the frequency of oscillation of the proposed circuit are controllable electronically through separate transconductance of the VD-DIBAs. The workability of the proposed structure has been demonstrated by PSPICE simulations using 0.35 µm MIETEC technology.
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