In analog signal processing and circuit design, realization of active filters and oscillators has become the important research areas. In reference  Biolek, Senani, Biolkova, and Kolka have introduced a number of modern analog active building blocks and VDIBA is one of them which is emerging very flexible and versatile active building block for analog signal processing and signal generation. The role played by SRCOs in control systems, signal processing, instrumentation and measurement and communication systems is well established in the open literature (see    and the references cited therein). Considerable attention has been given by the various researchers in the realization of SRCOs using various active building blocks because of their several merits over conventional op-amp-based SRCOs (see  -  and the references cited therein). The applications, advantages and usefulness of VDIBA have now been recognized in the realization of the first-order all-pass filter and oscillator   , and universal biquadratic filters   . However, to the best knowledge and belief of the authors, none of the SRCOs using VDIBAs has yet been presented in the literature with independent control of oscillation condition (OC) and oscillation frequency (OF) so far. Therefore, the purpose of this communication is to present a new SRCO using two VDIBAs along with a bare minimum number of three passive components. The proposed structure offers: 1) independent electronic control of oscillation condition; 2) independent control of oscillation frequency through a resistor; 3) low passive and active sensitivities and 4) very good frequency stability. The workability of the proposed SRCO has been confirmed by SPICE simulations using 0.18 µm TSMC technology.
2. New Oscillator Circuit
The symbolic notation and equivalent model of the VDIBA are given in Figure 1(a) and Figure 1(b) respectively  . The structure of VDIBA has two voltage inputs of high impedance, a voltage input terminal of low impedance and a current output terminal of high impedance. The ideal terminal equations between port voltages and currents can be expressed as: I+ = 0 = I−, Iz = gm (V+ − V−) and Vw− = −Vz, where gm, represents the transconductance of VDIBA.
The presented single-resistance-controlled sinusoidal oscillator circuit is shown in Figure 2.
Figure 1. (a) Symbolic notation; (b) equivalent model of VDIBA.
Figure 2. The new SRCO structure.
The characteristic equation (CE) of the proposed SRCO of Figure 2, using a routine circuit analysis can easily be obtained as:
From Equation (1), the oscillation condition (OC) and oscillation frequency (OF) can be determined as:
From Equations (2) and (3), it is obvious that OF is independently controllable by resistor R0 and OC is independently controllable electronically by transconductance gm1.
3. Frequency Stability Analysis of the Presented SRCO
Frequency stability may be considered to be an important figure of merit of an oscillator. The frequency stability factor is defined as  , where is the normalized frequency, and represents the phase function of the open loop transfer function of the oscillator circuit, with C1 = C/2, C2 = C, R0 = R/n and gm1 = gm2 = 1/R, SF for the proposed SRCO is found to be
Thus for larger values of n, the presented oscillator circuit enjoys a very good frequency stability.
4. Non-Ideal Analysis and Sensitivity Performance
Let and denote the parasitic resistance and parasitic capacitance of the Z-terminal of VDIBA. Taking the non-idealities into account, namely, the voltage of W-terminal where denotes the voltage tracking error of Z-terminal of VDIBA, the expressions for characteristic equation, CO and FO respectively become:
Therefore the expressions for OC and OF are given as:
Therefore the active and passive sensitivities can be obtained as:
Ideally, the various sensitivities of OF with respect to passive elements Cz, Rz, C1, and C2 are found to be
For the typical values of Cz = 0.81 pF, Rz = 53 kΩ, β+ = 1 along with C1 = 0.5 nF, C2 = 1.0 nF, R0 = 950 Ω, the various sensitivities are found to be , , , , ,
which are all low.
Figure 3 shows the CMOS implementation of the VDIBA used, which was biased with VDD = 0.9 V D.C. = −VSS and Ib was taken 100 µA.
5. Simulation Results
To confirm theoretical analysis, the proposed SRCO was simulated using CMOS VDIBA (as shown in Figure 3). The passive components were used as C1 = 0.5 nF, C2 =1.0 nF, R0 = 950 Ω. The transconductance of VDIBA was controlled by bias current Ib. SPICE generated output waveforms indicating transient and steady state responses are shown in Figure 4(a) and Figure 4(b) respectively.
Figure 3. Implementation of CMOS VDIBA  .
Figure 4. (a) Transient output waveform; (b) Steady state response of the output.
These results, thus, confirm the validity of the proposed configuration. Figure 5 shows the output spectrum, where the total harmonic distortion (THD) is found to be 1.996%. Figure 6 shows the variation of frequency with resistance R0. A comparison with other previously known SRCOs using different active building blocks has been given in Table 1.
The implementation of CMOS VDIBA employing 0.18 μm TSMC technology was used from  and the device parameters were taken from  . The aspect ratios of various MOSFETs used in CMOS VDIBA of Figure 7 were taken from reference  .
From Equations (8) - (10), this is obvious that the values of various sensitivities of passive and active components are less than half.
This work presents VDIBAs-based SRCO which employs minimum number of passive elements (namely, one resistor, two capacitors) and offers independent control of OF through the resistor R0 and OC through the transconductance gm1 (thus the circuit enjoys the electronic control of OC), low passive and active sen-
Figure 5. Simulation result of the output spectrum.
Figure 6. Variation of frequency with R0 of the proposed SRCO.
Table 1. A comparison with other previously known SRCOs using different active build- ing blocks.
Figure 7. Monte-Carlo analysis of the SRCO.
sitivities and a very good frequency stability. This communication, therefore, added a new application circuit to the existing repertoire of VDIBAs-based application circuits.
The authors gratefully acknowledge Prof. Dr. D. R. Bhaskar, Professor, Department of Electronics and Communication Engineering, Delhi Technological University, Shahbad Daulatpur, Main Bawana Road, Delhi-110042, India, useful suggestions/discussions.