Switched mode dc-dc power converters are widely used in the field of Power Electronics for the past few decades. In recent years their research, development and production have been in increasing rate due to their wide range of applications in various fields such as computer peripheral systems, medical equipments, communication devices, adapters in consumer electronics, portable electronic devices, fuel cell applications, photo voltaic arrays, power factor correction applications, and harmonic elimination. These switched mode dc-dc power converters have several advantages in comparison with linear power supplies. They are smaller in size, have high power density and efficiency, lesser component stress and lower in cost. Among the dc-dc converters, buck and boost converters are widely used but in practice, the voltage transfer ratio is limited with the increase in duty cycle due to the power semiconductor switches, power diodes and the equivalent series resistance of the passive components. Moreover increase in duty cycle may result in the reverse recovery problems of the semiconductor devices  -  . Many researches are carried out since 1940s to derive the mathematical modeling for the high power dc-dc converters. Even though the transfer function models have been derived successfully for the basic converter topologies, this method is limited to linear time invariant systems. Moreover the major disadvantage is that this method is derived by assuming zero initial conditions  . This drawback can be overcome by state space averaging technique. This technique is suitable for obtaining an analytical, numerical and optimization solution for the closed loop control systems. It can also be applied to multi input and multi output systems. It’s very simple to obtain the response of the system with initial conditions by using this method. The system properties like controllability and observability can be easily determined by using state space averaging technique  . When compared with the basic converter topologies like buck and boost converters which are of second order, the POSLL converter is of higher order. Hence the sate modeling is quite complex and it is difficult to exemplify their performance characteristics. In many of the industrial applications, it is customary to reduce the order of the dc-dc converter system, in which the smaller components are neglected. Hence the POSLLC has been reduced to a lower order by which the state model can be reduced to a lower order converter  .
The increasing use of micro power consumption technique in the field of microelectronics and computer manufacturing necessitates the usage of high power density switched mode power supplies. In order to fortify the above said requirement, we need to go for the dc-dc converters which combine voltage lift technique and switched capacitor converters. The voltage lift technique which results in high voltage transfer gain is one of the prominent methods used in electronics circuits design. One such converter is a Positive Output Super Lift LUO Converter (POSLLC). The unique features of the POSLLC are miniature size due to the presence of switched capacitor which can easily be incorporated into high power density IC chips, enhanced voltage transfer gain, highly efficient, increased power handling capacity, less sensitivity to EMI and highly reliable  .
Since the evolution of modern electronic systems such as manufacturing of computer systems, medical instruments, and communication equipments, the dc-dc converters are endowed with greater challenges for their development with compact, highly reliable and excellent quality. In the past research methods, many linearized models were developed for linear control of the dc-dc converters, which result in deterioration of control performances under line and load variations. In most of the controller design, it’s a common practice to neglect the system uncertainties. But in practice since the dc-dc converters are nonlinear time varying systems, it is inevitable to consider the uncertainties caused due to variation in the system parameters, modeling errors, operating conditions and sensors used for measurements. Hence it is essential to design robust and highly susceptible controllers with excellent dynamic response, faster settling time, reduced steady state error, lesser overshoots and undershoots   . Many of the power electronic engineers have focused their research using state feedback control but they have focused lesser attention towards the sensor less observer which reconstructs the states of voltage and current. Though the current mode control scheme is widely used, there exists a problem in sensing of the current which results in noise generation. An excellent solution can be provided by the observer controller that acts as sensor less current mode control for estimating all the states of the dc-dc converters shown by implementing these type of controllers used in various type of dc-dc buck-boost, interleaved converter to get better dynamic performance with better voltage regulation and high efficiency   .
The main objective of this paper is to design the robust observer controller for POSLL converter that rectifies the above mentioned problems. The state feedback control is designed in order to obtain the stability of the converter using pole placement technique. An observer gain matrix is derived in order to estimate all the unmeasurable state variables. The POSLL converter is modeled using state space averaging technique. The observer controller is designed by combining the state feedback control and observer gain matrix using separation principle. The distinctive attribute of the separation principle is that the state feedback control and the observer gain matrix can be designed individually and both can be merged together to provide a dynamic observer controller. MATLAB/Simulink is used to perform the simulation. The controller performance is evaluated experimentally and the results are illustrated. The sections are organized as follows: Section 2 discusses design of POSLL converter; Section 3 discusses the modeling; Sections 4 explains the design of state feedback matrix and the observer gain matrix; and Sections 5 gives the simulation results. Conclusion is given in Section 6.
2. Design of POSLL Converter
The POSLL converter shown in Figure 1(a) is the latest development in the dc?dc converters which is used to amplify the high rate of voltage transfer gain. In the given circuit diagram, the dc input voltage source is indicated as VS, SW represents the power n-channel MOSFET switch, C1 and C2 are the two capacitors, L is the inductor, D1 and D2 represent the two freewheeling diodes and Ro is the resistive load. The high power density is achieved by operating the converter in continuous conduction mode by assuming all the circuit parameters as ideal.
There are two operating modes in POSLL converter which is explained as follows.
(a) (b) (c)
Figure 1.(a) Schematic diagram of POSLL Converter; (b) Equivalent circuit of POSLL Converter for mode1; (c) Equivalent circuit of POSLL Converter for mode 2.
Mode1 represents the ON time of the switch and mode 2 represents OFF time of the switch.
Mode 1: When the switch is in ON state, the diode D1 starts conducting and within a very short duration of time the capacitor C1 starts charging and attains a constant voltage level of source voltage, VS. The current through the inductor IL depends on the source voltage. The capacitor C2 supplies energy to the load R. The equivalent circuit for the POSLL Converter is shown in Figure 1(b).
Mode 2: When the switch is in OFF state, the diode D2 conducts and the energy to the capacitor C2 and the load resistance R are supplied by the decreasing inductor current, iL. At the end of this mode, the inductor current decreases to the value of ( ). The equivalent circuit of POSLLC for this mode of operation is shown in Figure 1(c).
Based on the above discussion the peak?peak ripple value of the inductor current and peak peak ripple voltage of the capacitor is obtained as follows:
where Toff is the off time of the converter given by, where α is the duty cycle ratio and T is the total time period given by. “” is the peak-peak value of the inductor current. It is a regular practice to assume as 10% to 30% of the load current.
where VO is the output voltage of the converter and f is the switching frequency. “” is the peak-peak ripple value of the capacitor voltage and it is assumed as 1% to 2% of the voltage across the load  . By using the above formulae the L and C values thus designed for the POSLL converter is illustrated in Table 1.
3. State Space Analysis of POSLL Converter
The mathematical modeling of the POSLL converter is derived based on the state space averaging technique. It is an effective method in which the PWM type converters are switched in between two or more operating states based on the duty cycle ratio of the converter. The semiconductor switch employed in the POSLL converter is turned on and off by a sequence of pulses generated at particular switching frequency, fS. Here the inductor current iL, and capacitor voltage VC are considered as the state vectors. The converter can be represented by the following set of dynamic equations describing the converter system during ON mode and OFF mode of the switch respectively.
During ON time,
During OFF time,
Table 1. Design parameters of POSLL converter.
In general, the state modeling of the system can be represented by the following set of affine continuous time state equations,
Here sw = 1 represents the on state of the switch and sw = 0 represents the off state of the switch. A1, A2, B1 and B2 are the coefficient matrices given by,
The output equation of the converter is represented as,
4. Design of Observer Controller for POSLL Converter
4.1. Design of State Feedback Matrix Using Pole Placement Technique
The ultimate objective is to design the state feedback matrix, m for the POSLL converter using pole placement technique. The control scheme for the converter is shown in Figure 2. The steady state value which has to be obtained is the controlled variable “y”. The state feedback matrices are designed in such a way that it should track any of the reference values. Here “r” is the reference value which is taken as step input. The root locus of the POSLL converter is drawn and the desired closed loop poles are placed for obtaining the desired output. The essential and adequate condition for the arbitrary pole placement of the system is that the converter system should be absolutely controllable and it will be very much simpler to find the state feedback gain matrix when the state equations are in the controllable canonical form  .
Figure 2. Control scheme with state feedback matrix.
Pole placement method is an effectual one through which it is probable to stabilize a completely controllable system by arbitrarily choosing the closed loop poles. The assumptions are made that all the state variables are measurable and available for feedback. In this method the state vector x is measured and is weighted by a constant feedback gain matrix, m and the result is deducted from the reference signal r.
The dynamic equations corresponding to continuous time system are as follows:
The output equation is given as follows,
The Eigen values of (A − Bm) should be placed in the left half plane for continuous time system in controllable canonical for (A, B) pair is equivalent to () and it is given by,
It is necessary to change the converter equations into accessible canonical structure and the transformation matrix T which converts the state equation of the POSLL converter in to canonical form is given by the following equation,
where are the coefficients of the characteristic equation of the system given by,
The closed loop control scheme is structured by feeding back each state variable to u, thereby giving,
By substituting the equation (6) in equations (8) and (17), the system matrix (A − Bm), for closed loop system is obtained and is described as,
Here the system equations are converted into controllable canonical form.
The characteristic equation of the closed loop system is written by inspection as follows,
By investigating the Equations (10) and (14), it is clearly observed that the equation of the closed loop converter in controllable canonical form can be obtained by careful assessment of the open loop system equation thereby appending the suitable mi to each and every coefficient. The required distinctive equation of the converter system for appropriate pole assignment is presumed as,
Here represents the desired coefficients. On comparison of equations (14) and (15) it can be written as,
By using the above steps the values for the state feedback matrices obtained for POSLL converter is given by . To examine the robustness of the control law as discussed earlier, a step input is given and the output y(t) is made to track the reference which is achieved in this case. It is illustrated in Figure 3.
Figure 3. Step response obtained for POSLL converter.
4.2. Design of Full Order State Observer Gain Matrix
The full order observer gain matrix is derived using the similar pole assignment procedure with the eventual objective of estimating the unmeasurable state parameters. The observer always intends to act upon the error resulting in faster response of the converter. The essential provision for the observer gain matrix design is that the dc-dc converter considered for the analysis should be completely state-controllable. Hence for the appropriate location of the observer poles the following assumptions are made as defined by the thumb rule.
The natural frequency of oscillation (observer controller) is approximately equal to 2 to5 times that of the natural frequency of oscillation of the system. Now, the active system equation along with a full-order state observer is described as follows:
Here m1 represents the coefficient of the state feedback matrix and r represents the step function.
The system equation along with the full order observer can be described by the following,
Here g represents the full order observer gain matrix.
Now the transfer function of the observer controller, which is a combination of state feedback matrix and full order observer, is obtained using separation principle. It is given by,
5. Simulation Results and Discussion
The POSLL converter along with observer controller is designed and simulated using MATLAB/Simulink. The design is carried out in continuous conduction mode with the values tabulated in Table 1. The eventual intention is to design an efficient controller for the POSLL converter and to make the converter track the desired reference values despite of large load disturbance and wide variations in the source voltage. The time domain analysis of this converter using controller is listed in Table 2 and it is evident that the system settles down very fast at 0.01s with rise time of about 0.005 s. The output response of the converter with the controller is obtained by varying both the source voltage and load resistance and it is shown in Figure 4. It is seen that the output voltage tracks the reference irrespective of load and source variations. The input voltage and load resistance are set as 12 V and 120 Ω respectively till 0.16 s and varied as 14 V and 115 Ω after that. Again at 0.32 s both the values are varied as 10 V and 110 Ω respectively. Irrespective of these deviations, the converter along with the observer controller is capable of maintaining the stiff output voltage of about 36 V persistently. The output voltage shows no indication of overshoots or undershoots and the system settles down
Figure 4. Output response of POSLL converter. VS―Source voltage, RO―Load resistance, VO― Output voltage, IL―Inductor current, IO―Load current.
Table 2. Performance characteristics of POSLL converter.
swiftly with much lesser settling time and with no output ripples. The corresponding output current and inductor current are also given in Figure 4.
In order to show the controller performance based on reference voltages should be changed from 36 V to 40 V at the same time line and load side disturbance also per-
pendicularly given to the controller the output voltage will be maintained constant that are shown in Table 4.
Figure 5. Output response of POSLL converter with variable reference voltages. VS―Source voltage, RO―Load resistance, VO―Output voltage, IL―Inductor current, IO―Load current.
Table 3. Output voltage and current corresponding to line disturbances
Table 4. Variation of output voltage corresponding to reference voltage with both line and load disturbances.
Table 5. Output Voltage consequent to load disturbances.
Thus, the design and implementation of observer based controller for POSLL converter by means of pole assignment method and separation principle have been successfully demonstrated in MATLAB/Simulink at different operating conditions. So as to guarantee the robustness of the controller load estimator is derived with help of full order state feedback control. The investigation and analysis are carried out using a classical root locus method which endows with a competent and effectual compensation for the POSLL converter. The numerical examination and simulation study shows that the observer controller designed for POSLL converter accomplishes rigid output voltage regulation, excellent dynamic characteristics and superior efficiency. It is suitable for any low power source applications such as portable electronic devices, computer peripherals, medical equipment, and power factor correction or fuel cell applications. In future work, the POSLL converter with observer controller plus pole placement technique will be analyzed.
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