A recent paper  published in this Journal has presented two configurations for realizing voltage-controlled floating inductance (VC-FI) realization using thee/four Current feedback op-amps (CFOA) along with an analog multiplier. The first circuit of  employs four CFOAs, three resistors, a grounded capacitor and an analog multiplier and has been shown1 to realize lossless VC-FI providing inductance value proportional to an external control voltage Vc. On the other hand, the second circuit of  employs one multiplier and as many passive components as in the former circuit, but uses one less CFOA to realize a lossless VC-FI inversely proportional to Vc. The circuits proposed in  however, suffer from two drawbacks: (i) employment of non-canonic number of resistors (three) and (ii) requirement of certain conditions/constraints to realize the intended type of FIs.
The purpose of this article is to present four new circuits which, in contrast to the circuits of  quoted above, employ a canonic number of resistors (only two) and, unlike the quoted circuits of  , do not require any component-matching/realization conditions.
2. Canonic Realizations of Lossless Voltage-Controlled Floating Inductors
The proposed circuits, which employ canonic number of only two resistors and a grounded capacitor (GC) for realizing lossless VC-FIs, are shown in Figure 1 and Figure 2 respectively. The proposed circuits are obtained by appropriate embedding2 of an analog divider (as in the circuits of Figure 1) and analog multiplier (as in the circuits of Figure 2) into appropriate lossless floating inductance circuits   . By a straight forward analysis, assuming the CFOAs to be characterized by, ,
Figure 1. Proposed circuits for realizing VC-FI proportional to VC.
Figure 2. Proposed circuits for realizing VC-FI inversely proportional to VC.
and, both the circuits of Figure 1 are found to be characterized by the following short-circuit admittance matrix:
Thus, the circuits realize an equivalent floating inductance. Note that, in contrast to the circuit of Figure 2(a) of  which requires matching of two resistors therein namely, R2 = R3 to realize the intended type of VC-FI, the circuits of Figure 1 here do not require any design constraints/conditions to be fulfilled to realize a VC-FI.
Consider now the circuits of Figure 2. By straight forward analysis, these two circuits are characterized by the following equation:
These circuits, therefore, realize an equivalent VC-FI of value. In this case also, it must be pointed out that while the circuit of Figure 3(a) of  requires two conditions namely and, no such conditions or constraints are needed in the new proposed circuits of Figure 2.
Lastly, it must also be noticed that in contrast to the circuits of Figure 2(a) and Figure 3(a) of  both of which require three resistors, the proposed new circuits require a bare minimum of only two resistors!
3. Applications of the Proposed VC-FIs, SPICE Simulation and Experimental Results
To check the workability of the proposed circuits, all the VC-FIs were tested by utilizing them in the realization of a second-order voltage-controllable notch filter as shown in Figure 3(a). The frequency response of the notch filter employing the VC-FI of Figure 1(a) and designed to obtain a notch frequency of 15.9 kHz is shown in Figure 3(b). Figure 3(c) shows the variability of the notch frequency with respect to the control voltage Vc for the notch filter when it was realized by using the VC-FI of Figure 2(a).
Figure 3. SPICE simulation results: (a) A voltage-controllable notch filter; (b) Frequency response of the notch filter realized by using the VC-FI of Figure 1(a); and (c) Variation of notch frequency with control voltage (Vc) with the notch filter realized using the VC-FI of Figure 2(a).
In the simulations, AD844 type CFOAs were used which were biased with ±12 V DC power supplies. The simulation results of Figure 3(b) and Figure 3(c) are seen to be in close agreement with the theoretical results.
For verifying the practical validity of the proposed VC-FI formulations, we present here the results of the hardware implementation of a voltage-controlled band reject filter (shown in Figure 4(a)) wherein the VC-FI was implemented with the configuration of Figure 2(b). AD844 type CFOAs biased with ±12 volts and MPY534 type analog multipliers biased with ±12 V were used along with the following component values: R1 = 1 k Ω, R2 = 1 k Ω, C1 = 1.0 nF, R0 = 680 Ω to obtain f0 = 5.2 kHz and bandwidth = 5.58 kHz. Vc was varied from 1 to 10 volts to vary the center frequency. An exemplary frequency response for Vc = 1 volt is shown in Figure 4(b) whereas the variability of f0 with respect to Vc has been shown in Figure 4(c).
4. Concluding Remarks
Four new lossless VC-FIs are introduced which employ a canonical number of passive components (namely, only one GC and two resistors) and realize the intended type of floating inductances without any conditions/design constraints. This is in contrast to the recently reported circuits of  for the same purposes which suffer from the drawback of employing a non-canonical number of resistors (three) and requirement of component matching/design constraint to be fulfilled.
The workability of the new circuits as VC-FIs and the variability of the inductance value through an external control voltage Vc were demonstrated by SPICE simulation results of a notch filter, as well as through experimental results of another voltage-con- trolled notch filter.
It is expected that the proposed new circuits may find applications in situations requiring voltage-controlled inductors.
Lastly, it may be mentioned that the realization of many other grounded/floating, positive/negative and generalized linear voltage controlled impedances, based upon the ideas contained in  -  are possible; for instance, see the two configurations of Figure 5 both of which realize VC-floating generalized impedance converters/inverters having equivalent floating impedance values given by:
Figure 4. Experimental results of (a) the band reject filter using the VC-FI of Figure 2(b); (b) experimentaly measured frequency response; (c) variation of the centre frequency with the controlled voltage.
Figure 5. Two exemplary circuits realizing voltage-controlled floating generalized impedance inverters/converters.
Furthermore, the negative floating impedances are realizable from the configurations of Figure 1, Figure 2 and Figure 5, by the simple artifice of interchanging some connections in the manner outlined earlier in  and  , while various types of grounded positive/negative voltage controlled impedances are realizable by shorting port 2 to ground (thereby also leading to a reduced number of CFOAs in each case).
Appendix 1: Some Appraisals
1) The analysis of Section 2 at pages 192-193 of  is clumsy. It is well-known (for instance, see   ) that a 2-port representing floating impedance Zeq is correctly characterized by either the following y-matrix  :
or equivalently, by the following transmission matrix  :
Thus, a straight forward analysis of the circuit of Figure 2(a) of  yield its correct y-matrix as:
Therefore, the circuit of Figure 2(a) of  will realize a lossless VC-FI subject to fulfillment of the condition R2 = R3.
On the other hand, the circuit of Figure 3(a) of  has a similar y-matrix with the condition of realization being R1 = R2. Therefore, the conditions and (R1 + R2) = R3 as given by the authors at page 193 of  for their circuit of Figure 3(a) are unnecessary.
2) While comparing their propositions of Figure 2(a) and Figure 3(a), the authors of  have cited an unpublished work3 as reference 17, which is extremely surprising since this unpublished reference is not an open literature and was, therefore, definitely not available to the authors of  . In fact, this unpublished work3 was quoted in the acknowledgement of reference  of this communication as reference 26. It is, therefore, obvious that the authors of the quoted paper  could have known the existence of this unpublished work (quoted as reference 17 in their paper  ) only from the published paper  which curiously has not been cited by them! In view of this, reference 17 of  in fact, should be reference  of the present paper.
3) Making a Hartley oscillator using an ideal op-amp is anomalous since inductor L1, due to being connected directly from the output of the ideal op-amp to ground, will not appear in any open loop transfer function (or loop gain) or the characteristic equation of the circuit. A resolution to this anomaly has recently been provided in  .
1For the correction of some discrepancies in the analysis in the quoted circuits of  and an anomaly in the citation of an earlier work therein, see Appendix 1.
2The techniques of embedding analog dividers and analog multipliers (as in the circuits of Figure 1, Figure 2 and Figure 5 here which have their origin in the earlier works of  -  ) to create op-amp-AM-based voltage-controlled-resistors have been taught by the first author (RS) in the course on Linear Integrated Circuits since 1990 and these unpublished ideas have been adopted by and circulated amongst the academic fraternity at numerous institutions freely.
3Senani, R, Novel linear voltage controlled floating-impedance configurations. ELL/96/53450, dated25 November 1996, unpublished. The above unpublished work was cited as reference 26 in  .
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