ABSTRACT With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has good performances but only for a single operating frequency. For multiple operating frequencies, to transmitting or receiving information through the multiple antennas systems, known as MIMO systems, it a new RF switch is required which should be capable of operating with multiple antennas and frequencies as well as minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw (DP4T) RF switch and in this research article we are discussing a process for the characterization of the MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented. For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured opti-cally. Some of the calculated material parameters are away from the expected values. These errors might be due to several factors such as a possible offset capacitance of the probes due to improper contact with the wafer which is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineering Environment Programming (VEE Pro, a Agilent product).
Cite this paper
nullV. Srivastava, K. Yadav and G. Singh, "Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch – A Review," Wireless Sensor Network, Vol. 3 No. 8, 2011, pp. 300-305. doi: 10.4236/wsn.2011.38031.
 O. Postolache, P. S. Girao, and J. D. Pereira, “Virtual instrumentation,” J. of Data Modeling for Metrology and Testing in Measurement Science, pp. 1-39, 2009.
 Jianhua Che, Qinming He, Qinghua Gao, and Dawei Huang, “Performance measuring and comparing of virtual machine monitors,” Proc. of 2008 IEEE/IFIP Int. Conf. on Embedded and Ubiquitous Computing, 17-20 Dec 2008, pp. 381-386.
 Viranjay M. Srivastava, “Capacitance-Voltage measurement for Characterization of a metal gate MOS process,” Int. J. of Recent Trends in Engineering, Vol. 1, No. 4, pp. 4-7, May 2009.
 S. M. Sze, VLSI Technology, 2nd Ed., Tata McGraw Hill, New York, 2003.
 S.Gandhi, VLSI Fabrication Principles, Silicon and Gallium Arsenide, John Wiley and Sons, New York, 2002.
 M. Popa, R. Ionel, V. Groza, and M. Marcu, “Virtual instrumentation application for system identification”, Proc. of IEEE Instrumentation and Measurement Technology Conference, 24-27 April 2006, pp. 842 – 846.
 Thamos J. Mego, “Online C-V doping profile measurement of low dose ion implant”, IEEE Trans. on Electron Devices, Vol. 27, No. 12, pp. 2268-2273, Dec 1980.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Application of VEE Pro software for measurement of MOS device parameters using C-V curve,” Int. J. of Computer Applications, Vol. 1, No. 7, pp. 43-46, March 2010.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Double pole four throw switch design with CMOS inverter,” Proc. of 5th IEEE Int. Conf. on Wireless Communication and Sensor Network, India, 15-19 Dec 2009, pp. 1-4.
 K. Jeyadheepan, P. Palanichamy, P. Kalyanasundaram, M. Jayaprakasam, C. Sanjeeviraja, and K. Ramachandran, “Automation of photoacoustic spectrometer using VEE Pro software,” J. of Measurement, Vol. 43, No. 10, pp. 1336-1344, Dec 2010.
 S. H. Jen, C. C. Enz, and D. R. Pehlke, “Accurate modeling and parameter extraction for MOS transistors valid up to 10 GHz,” IEEE Trans Electron Devices, Vol. 46, No. 11, pp. 2217-2227, 1999.
 S. Lee, and H. K. Yu, “A semianalytical parameter extraction of a SPICE BSIM3v3 for RF MOSFET’s using S-parameters,” IEEE Trans. Microwave Theory and Technology, Vol. 48, No. 3, pp. 412-416, 2000.
 J. Gao, and A. Werthof, “Scalable small-signal and noise modeling for deep-submicrometer MOSFETs,” IEEE Trans. Microwave Theory and Technology, Vol. 57, No. 4, pp. 737-744, 2009.
 Y. Cheng, J. Deen, and C. H. Chen, “MOSFET modeling for RF IC design,” IEEE Trans. Electron Devices, Vol. 52, No. 7, pp. 1286-1303, 2005.
 D. R. Pehlke, M. Schroter, and A. Burstein, “High-fre- quency application of MOS compact models and their development for scalable RF model libraries,” Proc. of Custom Integrated Circuits Conference, 1998, pp. 219- 222.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of double-gate CMOS for double-pole four- throw RF switch design at 45-nm technology,” J. of Computational Electronics, Vol. 10, No. 1-2, pp. 229-240, June 2011.
 Y. Cheng, and M. Matloubian, “High frequency characterization of gate resistance in RF MOSFETs,” IEEE Electron Device Lett, Vol. 22, No. 2, pp. 98-100, 2001.
 X. Jin, J. J. Ou and C. H. Chen, “An effective gate resistance model for CMOS RF and noise modeling,” Proc. of IEEE Electron Devices Meeting, 1998, pp. 961-964.
 Kay Henry and Karl Coumou, “New direct measurement techniques for thermal conductivity, thermal diffusivity, and specific heat of advanced materials,” J. of Thermochimica Acta, Vol. 192, pp. 129-134, Dec 1991.
 L. Gaioni, M. Manghisoni, L. Rattia, V. Reb, V. Spezialia, and G. Traversi, “Instrumentation for gate current noise measurements on sub-100 nm MOS transistors,” Proc. of Topical Workshop on Electronics for Particle Physics, Greece, 15 - 19 Sep 2008, pp. 436-440.
 V. M. Cvjetkovic, M. S. Matijevic, M. D. Grujovic, and M. Z. Stefanovi, “Helicopter laboratory model experiment with web access,” Int. J. of Online Engineering, Vol. 5, No. 1, 2009, pp. 148-153.
 A. Grout and Rodrigues da Silva, “Remote laboratory description language based on XML,” Int. J. of Online Engineering, Vol. 5, No. 1, p. 25, 2009.
 B. Pradarelli, L. Latorre, and P. Nouet, “Integrated circuits testing: remote access to test equipment for labs and engineering,” Int. J. of Online Engineering, Vol. 5, No. 1, pp. 43-50, 2009.
 David Lowe, Chris Berry, Steve Murray, and Euan Lindsay, “Adapting a remote laboratory architecture to support collaboration and supervision,” Int. J. of Online Engineering, Vol. 5, No. SI 1, pp. 51-56, 2009.
 S. C. Pandey, A. Maiti, T. K. Maiti, and C. K. Maiti, “Online MOS capacitor characterization in LabVIEW environment,” Int. J. of Online Engineering, Vol. 5, No. 1, pp. 57-60, 2009.
 P. S. Dasa, and A. Biswas, “Improved electrical and interfacial properties of RF sputtered HfAlOx on n-GaAs with effective Si passivation,” J. of Applied Surface Science, Vol. 25, No. 6, pp. 6618-6625, 2010.
 Emanuele Orgiu, Simone Locci, Beatrice Fraboni, Erika Scavetta, Paolo Lugli, and Annalisa Bonfiglio, “Analysis of the hysteresis in organic thin-film transistors with polymeric gate dielectric,” J. of Organic Electronics, Vol. 12, pp. 477-485, 2011.
 Yu Yuning, Sun Lingling, and Liu Jun, “RF CMOS modeling: a scalable model of RF-MOSFET with different numbers of fingers,” J. of Semiconductors, Vol. 31, No. 11, Nov 2010.
 C. Cao, and K. O. Kenneth, “A 90 GHz voltage controlled oscillator with a 2.2 GHz tuning range in a 130 nm CMOS technology,” Proc of Symp. VLSI Circuits Dig Tech., 2005, pp. 242.
 C. Y. Chan, S. C. Chen, and M. H.Tsai, “Wiring effect optimization in 65 nm low-power NMOS,” IEEE Electron Device Lett, Vol. 29 No. 11, pp. 1245, 2008.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch,” Microelectronics J., Vol. 42, No. 3, pp. 527-534, March 2011.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Performance of double-pole four-throw double-gate RF CMOS switch in 45-nm technology,” Int. J. of Wireless Engineering and Technology, Vol. 1, No. 2, pp. 47-54, Oct 2010.
 P. H. Woerlee, M. J. Knitel, R. Langevelde, D. Klaassen, L. F. Tiemeijer, and A. J. Scholten, “RF CMOS performance trends,” IEEE Trans. on Electron Devices, Vol. 48, No. 8, pp. 1776-1782, Aug 2001.
 Koichi Kato and Kenji, “Numerical analysis of switching characteristics in SOI MOSFET”, IEEET Trans. on Electron Devices, Vol. 33, pp. 133-139, Feb 1986.
 E. H. Nicollian and J. R. Brews, MOS Physics and Technology, Wiley, New York, 1982.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Double-Pole Four-Throw RF CMOS switch design with double-gate transistor,” Proc. of 2010 Annual IEEE India Conference (INDICON-2010), 17-19 Dec 2010, India, pp. 1-4.
 S. M. Sze, “Physics of Semiconductor Devices”, 2nd Ed., Wiley, New York, 1985.
 Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of cylindrical surrounding double-gate MOSFET for RF switch,” Microelectronics J., Vol. 42, No. 9, pp. 1025-1036, Sept 2011.
 L. J. Passmore, O. Awadelkarim, and J. P. Cusumano, “High sensitivity tracking of MOSFET damage using dynamic-mode transient measurements,” IEEE Trans. on Instrumentation and Measurement, Vol. 59, No. 6, pp. 1734-1742, June 2010.
 G. P. Beyer and C. W. Scarantino, “An implantable MOSFET dosimeter for the measurement of radiation dose in tissue during cancer therapy,” IEEE. J. of Sensors, Vol. 8, No. 1, pp. 38-51, Jan 2008.
 A. Worapishet, A. Demosthenous, and Liu Xiao, “A CMOS instrumentation amplifier with 90 dB CMRR at 2 MHz using capacitive neutralization: Analysis, design considerations, and implementation,” IEEE Trans. on Circuits and Systems, Vol. 58, No. 4, pp. 699-710, April 2011.