Received 2 May 2016; accepted 20 May 2016; published 14 July 2016
The active power factor correction circuits for low and medium power applications have been increasing in recent years  ,  with the choice of research to improve the power quality according to the harmonic regulations and standards. Conventionally, most of the active PFC circuits comprises of a front end diode bridge rectifier (DBR) which distorts the utility line voltage. This reduces the supply power factor and also the optimized usage of utility system  . Referring to the conventional PFC in Figure 1, in switch ON-time, the current flows through two diodes in bridge rectifier and the power switch (Q).
During the switch OFF-time, current flows through another two diodes of DBR and the diode (Do) in the output side. Thus, in each switching cycle, three devices are conducted and result in significant conduction losses due to the forward voltage drop across the bridge diode. This degrades the rectifier’s efficiency especially at a low input voltage.
In order to maximize the rectifier efficiency, many research works have been directed towards designing the bridgeless PFC converters with the elimination of Diode Bridge at the front end  . The current in this bridgeless PFC converter is made to flow in minimum number of switches. Accordingly, the conduction losses can be reduced and efficiency can be improved. Recently in the literature, there are several bridgeless PFC rectifiers that have been introduced for step-up/step-down applications. The most frequently used topology is the bridgeless boost PFC rectifier because of its low cost and high efficiency. It has some major practical drawbacks such as, starting inrush currents, difficulties in input/output isolations, output voltage higher than the peak input voltage, lack of current limitation in overload conditions.
In a bridgeless single ended primary inductance converter (SEPIC) converter, the output current is discontinuous with high ripple content. A bridgeless buck PFC converter for step down voltage applications was proposed. However, this buck PFC converter has high total harmonic distortion (THD)  ,  and low power factor. The next topology for PFC applications is the Cuk PFC converter. It offers several advantages such as natural protection against start-up in rush current, less current ripple at input side, less electromagnetic interference (EMI) in Discontinuous Conduction Mode (DCM)  -  . The input and output currents are continuous with low ripples compared to SEPIC PFC converter  -  . Thus, the bridgeless Cuk converter is a potential candidate compared over the basic PFC topologies, especially for low power applications. In this paper, the bridgeless Cuk PFC converter topologies are taken and their performances are analyzed. A comparison is made against the efficiency, power factor correction and reduction in THD for all the Cuk PFC rectifiers.
2. Types of Bridgeless Cuk PFC Rectifiers
The Bridgeless Cuk PFC rectifiers are shown in the Figures 2(a)-(c). There are three topologies, viz., Type-1, Type-2, and Type-3 Cuk PFC rectifiers. These topologies are configured by connecting the two DC-DC Cuk converters, each one for the half period of the supply voltage. The circuit operations of the three topologies during positive and negative half periods are shown in Figures 3(a)-(f). Note in Figures 3(a)-(f) the current flow paths are in one or two semiconductors and hence the current stresses through the switches are reduced. Thus
Figure 1. Conventional Cuk PFC converter.
Figure 2. Bridgeless Cuk PFC converters. (a) Type-1; (b) Type-2; (c) Type-3.
Figure 3. (a) & (b) Positive half and negative half cycle operation of Type-1; (c) & (d) Positive half and negative half cycle operation of Type-2; (e) & (f) Positive half and negative half cycle operation of Type-3.
improving the efficiency compared to conventional Cuk PFC rectifiers. The output bus for the type 1, type 3 converter is connected with the supply side through the slow recovery diodes Dp and Dn (Figure 2(a) and Figure 2(c)) and in the type 2 topology (Figure 2(b)), it is directly connected. Thus, these PFC configurations are a resistant for common mode EMI.
The rectifiers uses two power switches Q1 and Q2. The control circuit for the Cuk rectifiers is simple since, both the switches are driven by the same control signal. The usage of inductor compared to the conventional topology is a drawback in terms of cost, but it improves the thermal performance. In addition, these topologies provide near zero ripple current at the input and output side of the PFC converter.
3. Operation of Cuk PFC Rectifier
The Type-3 Cuk PFC rectifier is taken for analysis and its operational performance is studied. This converter is assumed to be operating at steady state condition and it follows the assumptions like ideal loss less components, pure sinusoidal AC voltage and all the capacitors are large such that there is no voltage ripples during the period Ts. Referring to Figure 3(e), during the positive half period of supply voltage, is the first DC-DC Cuk circuit L1-Q1-C1-Lo1-Do1, is active through diode Dp and is connects the input source to Output port. During the negative half period shown in Figure 3(f), the second Cuk circuit, L2-Q2-C2-Lo2-Do2, is active through diode Dn and connects the input source to output end. Thus, in both periods the AC supply source reaches the output ports.
There are three topological modes of operation for Type-3 Cuk rectifier in DCM operation during one switching stage Ts. The operating stages over a switching cycle are described as follows.
3.1. Stage 1 Operation [t0, t1]
This stage of operation starts when the Q1 ON in the interval t0 to t1, as shown in Figure 4. The inductor current iL1 forward biases the Diode Dp and the diode Dn is reverse biased by the input voltage. The reverse voltage (Vac + Vo) reverse biases the output diode Do1 and at the same time, Do2 is reverse biased by the output voltage Vo.
In this mode, the inductor currents iL1 and iLo1 increase linearly with the input voltage, while due to the constant voltage across C2, the current through Lo2 is zero. The various inductor currents during this stage 1 time interval is shown in Figure 5.
The peak current flowing through the active switch Q1 is given by
where Vm is the peak amplitude of the supply voltage, D1 is the duty cycle for power switch and Le is the parallel combination of inductors L1 and Lo1 respectively.
Figure 4. Stage 1 operation of Type-3 converter.
Figure 5. DCM waveforms of the converter for one switching period from t0 to Ts.
3.2. Stage 2 Operation [t1, t2]
This mode starts when the switch Q1 turns OFF between the time interval of t1 to t2 and the diode Do1 is turned ON. Thus it provides a flow path for the inductor currents iL1 and iLo1 as shown in Figure 6. The diode Dp remains in conducting state to provide a path for iL1.
In this interval, Diode Do2 remains in reverse biased condition. The interval ends when iDo1 reaches zero and thus a zero current turn OFF.
3.3. Stage 3 Operation [t2, t3]
The stage 3 operation starts at t2 and ends at t3. During this interval, the diode Dp conducts and provide a flow path for iL1 as shown in Figure 7. The inductors of the Cuk rectifiers, in this interval perform as constant current sources.
The voltage across the three inductors in this interval is zero and the current iL1 charges capacitor C1. When switch Q1 is turned ON, the duration of this stage is ended.
4. Simulation Study of Type 3 Cuk Converter
To verify the feasibility of type 3 bridgeless Cuk PFC, simulation model is designed using MATLAB/ SIMULINK and it is shown in Figure 8. The PFC operation of the circuit under DCM mode is controlled by Fuzzy logic controller and the harmonics is controlled by voltage follower control approach.
Fuzzy Logic Controller Based BL Cuk Rectifier
The Figure 8 shows the MATLAB simulation circuit of BL Cuk rectifier controlled by fuzzy logic controller (FLC). This FLC uses the Mamdani fuzzy inference system  -  and it has the following parameters.
Triangular membership functions for both Input and output variables.
Fuzzification using continuous universe of discourse.
Implication function using the “min” operator.
Defuzzification using the “centroid” method.
The inputs of the FLC are error and change in error voltage. Figure 9 shows the input and output triangular membership function assigned for the work of power factor correction.
Table 1 includes five linguistic variables for error voltage and for changing error voltage. They are Zero (Z), Negative Big (NB), Negative Small (NS), Positive Big (PB), and Positive Small (PS). The 25 fuzzy rules are made using the input variables and are as follows:
Figure 6. Stage 2 operation of Type-3 Cuk converter.
Figure 7. Stage 3 operation of Type-3 Cuk PFC converter.
Table 1. Fuzzy rule table.
Figure 8. BL Type-3 Cuk PFC converter with fuzzy logic controller.
Figure 9. Input and output triangular membership functions.
If (e is Ai) and (Δe is Bi) then (u is Yi)
Where, e and Δe provides error voltage and the change in error voltage. u is the output from the fuzzy logic controller which is used for switching the power switches of Cuk converter. Ai, Bi is the input membership functions of the FLC and Yi output membership function. By using the inference method as min operator and defuzzification by centroid formula for weighting all the fuzzy rule contributions, the controlled crisp value is obtained to operate the switches in the BL Cuk converter. This gives the input power factor correction.
5. Results and Discussion
The input voltage and current waveforms obtained from the SIMULINK software model of fuzzy Controlled Bridgeless Type-3 Cuk PFC rectifier are shown in Figure 10 and Figure 11. It is observed, a near sinusoidal supply current at the input side of PFC converter and it follows the supply voltage.
The input voltage to the simulation circuit is 100 Vrms (141 V peak to peak) and the type -3 BL Cuk converter work in DCM mode. The output voltage obtained is 50 V in buck operation and the output current is 3.3 Amps.
Figure 12 and Figure 13 show the voltage and current waveforms taken at the output side after implementation of fuzzy controller. The framed fuzzy rules work on the Cuk converter and reduces the supply current THD. Thus it gives good power factor correction compared to the conventional controller.
Figure 14(a) shows the source current THD observed at the supply side of Cuk converters. The THD is within the tolerable limits of IEEE harmonic standards. Figure 14(b) and Figure 15(a) show the variation of power factor for different output power. The obtained power factor is nearer to unity for the proposed type 3 converter. Figure 15(b) shows the efficiency with conventional and bridgeless Cuk rectifier configurations. Type-3 Cuk converter shows high efficiency compared to other conventional circuits and so, it is recommended for low power PFC applications.
Figure 10. Input voltage waveform of fuzzy controlled Type-3 BL Cuk PFC converter.
Figure 11. Input current waveform of fuzzy controlled Type-3 BL Cuk PFC converter.
BL Cuk topologies based on fuzzy controller have been presented for power factor correction in this paper. The
Figure 12. Output voltage waveform of fuzzy controlled Type-3 BL Cuk PFC converter.
Figure 13. Output current waveform for fuzzy implemented Type-3 BL Cuk PFC converter.
Figure 14. Comparative analysis. (a) Current THD and output power; (b) Power factor.
Figure 15. Comparative analysis. (a) Power factor and input voltages; (b) Efficiency and output power.
validity of fuzzy controller and the performance of the topologies are verified by using MATLAB simulation. These BL topologies have been operated in DCM mode for achieving an inherent power factor correction at the supply side. For varied supply voltage, good dynamic performances have been attained with improved power quality limits of the harmonic standards. Moreover, the topologies can improve the efficiency by approximately about 1% in comparison to the conventional PFC circuits. The Type-3 Cuk converter shows better performance compared to other topologies and it is recommended for low power PFC applications.
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