CS  Vol.5 No.12 , December 2014
The Application and Adaptation of the Two Sources of Code and Natural Encoding Method for Designing a Model of Microprogram Control Unit with Base Structure
ABSTRACT
The article presents a modification to the method which applies two sources of data. The modification is depicted on the example of a compositional microprogram control unit (CMCU) model with base structure implemented in the complex programmable logic devices (CPLD). First, the conditions needed to apply the method are presented, followed by the results of its implementation in real hardware.

Cite this paper
Smoliński, Ł. , Barkalov, A. and Titarenko, L. (2014) The Application and Adaptation of the Two Sources of Code and Natural Encoding Method for Designing a Model of Microprogram Control Unit with Base Structure. Circuits and Systems, 5, 301-308. doi: 10.4236/cs.2014.512031.
References
[1]   Luba, T. (2004) Synteza Ukladów Logicznych. Warsaw University of Technology Press, Warsaw.

[2]   Baranov, S. (1994) Logic Synthesis for Control Automata. Kluwer Academic Publishers, Israel.
http://dx.doi.org/10.1007/978-1-4615-2692-6

[3]   DeMicheli, G. (1994) Synthesis and Optimization of Digital Circuits. McGraw-Hill, Boston.

[4]   Milik, A. and Hrynkiewicz, E. (2012) Synthesis and Implementation of Reconfigurable PLC on FPGA Platform. International Journal of Electronics and Telecommunications, 58, 85-94.
http://dx.doi.org/10.2478/v10177-012-0012-8

[5]   Barkalov, A. and Wegrzyn, M. (2006) Design of Control Units with Programmable Logic. University of Zielona Góra Press, Zielona Góra.

[6]   Klimowicz, A. and Salauyou, V. (2012) The Synthesis of Combined Mealy and Moore Machines Structural Model Using Values of Output Variables as Codes of States. 15th Euromicro Conference on Digital System Design (DCD), Izmir, 5-8 September 2012, 789-794.
http://dx.doi.org/10.1109/DSD.2012.130

[7]   Kubica, M. and Kania, D. (2011) Synteza Logiczna Zespolu Funkcji Ukierunkowana na Minimalizacje Liczby Wykorzystywanych Bloków Logicznych PAL w Oparciu o Zmodyfikowany Graf Wyjsc. Pomiary, Automatyka, Kontrola, 57, 737-740.

[8]   Altera (2009) Max II Device Handbook.
http://www.altera.com/literature/hb/max2/max2_mii5v1.pdf

[9]   Czerwinski, R. and Kania, D. (2012) Area and Speed Oriented Synthesis of FSMs for PAL-based CPLDs. Microprocessors & Microsystems, 36, 56-61.
http://dx.doi.org/10.1016/j.micpro.2011.06.004

[10]   Salauyou, V. and Grzes, T. (2007) FSM State Assignment Methods for Low-Power Design. 6th International Conference on Computer Information Systems and Industrial Management Applications, Minneapolis, 28-30 June 2007, 345-350.
http://dx.doi.org/10.1109/CISIM.2007.32

[11]   Barkalov, A. and Titarenko, L. (2008) Logic Synthesis for Compositional Microprogram Control Units. Springer.
http://dx.doi.org/10.1007/978-3-540-69285-0

[12]   Altera (2007) Using the UFM in MAX II Devices. www.altera.com/literature/an/an489.pdf

[13]   Cypress (2003) Delta39K ISR CPLD Family.
http://pdf.datasheetcatalog.com/datasheet2/9/0pfaeyx4ushkk0zzjksaycgxhqky.pdf

[14]   Barkalov, A., Titarenko, L. and Smoliñski, L. (2013) Hardware Reduction for Compositional Microprogram Control Unit Dedicated for CPLD Systems. Proceedings of IEEE East-West Design and Test Symposium EWDTS’13, Rostovon-Don, 27-30 September 2013, 1-6.
http://dx.doi.org/10.1109/EWDTS.2013.6673200

[15]   Barkalov, A., Titarenko, L. and Smoliñski, L. (2014) CMCU Model with Base Structure Dedicated for CPLD Systems. Przeglad Elektroniczny. (in Press)

[16]   Baranov, S. (2008) Logic and System Design of Digital Systems. TUT Press, TelAviv.

[17]   Adamski, M. and Barkalov, A. (2006) Architectural and Sequential Synthesis of Digital Devices. University of Zielona Góra Press, Zielona Góra.

[18]   Wisniewska, M., Wisniewski, R. and Adamski, M. (2009) Reduction of the Microinstruction Length in the Designing Process of Microprogrammed Controllers. Przeglad Elektroniczny, 11, 114-117.

[19]   Barkalov, A., Titarenko, L. and Smoliñski, L. (2012) Optimization of Control Unit based on Construction of CPLD. Pomiary, Automatyka, Kontrola, 58, 93-96.

[20]   Barkalov, A., Titarenko, L. and Smoliñski, L. (2011) Optimization of Microprogram Control Unit with Code Sharing. Proceedings of IEEE East-West Design and Test Symposium (EWDTS), Sevastopol, 9-12 September 2011, 55-59.
http://dx.doi.org/10.1109/EWDTS.2011.6116573

[21]   Maxfield, C. (2004) The Design Warrior’s Guide to FPGAs: Devices, Tools and Flows. Elseveir.

[22]   Wisniewski, R. (2009) Synthesis of Compositional Microprogram Control Units for Programmable Devices. University of Zielona Góra Press, Zielona Góra.

[23]   Barkalov, A. and Titarenko, L. (2009) Logic Synthesis for FSM-Based Control Units. Springer, Zielona Góra.
http://dx.doi.org/10.1007/978-3-642-04309-3

[24]   Kolopieñczyk, M. (2008) Application of Address Converter for Decreasing Memory Size of Compositional Microprogram Control Unit with Code Sharing. Lecture Notes in Control and Computer Science, 12, 88-96.

[25]   Bieganowski, J. (2011) Synthesis of Microprogram Control Units Oriented toward Decreasing the Number of Macrocells of Addressing Circuit. Lecture Notes in Control and Computer Science, 17, 103-109.

[26]   Salauyou, V. and Klimowicz, A. (2010) Synteza logiczna ukladów cyfrowych w strukturach programowalnych. Oficyna Wydawnicza Politechniki Bialostockiej, Bialystok.

 
 
Top