In recent studies, reversible logic has emerged as a great scene of research, having applications in low power CMOS circuits, optical computing, quantum computing and nanotechnology. The classical logic gates such as AND, OR, EXOR and EXNOR are not reversible. In the existing literature, reversible sequential circuits designs are offered that are improved for the number of the garbage outputs and reversible gates. Minimizing the number of garbage is very noticeable. In the present paper, we show a design of the reversible comparator based on the quantum gates implementation of the reversible DG gate. The reversible DG gate is designed by using 3 × 3 quantum gates such as NOT, CNOT, Controlled-V and Controlled-V+ gates. Also, we have used the TR gate and various types of quantum gates in the implementation results. Low power three-bit comparator is designed using DG Gate, New Gate and Fredkin Gate. In order to evaluate the benefit of using the DG gate proposed in this paper, one-bit comparator is constructed. The design is useful for the future computing techniques like quantum computers. The proposed designs are implemented using VHDL and functionally investigated using Quartus II simulator.
 A. N. Nagamani, H. V. Jayashree and H. R. Bhagyalakshmi, “Novel Low Power Comparator Design Using Reversible Logic Gates,” 2011 Indian Journal of Computer Science and Engineering (IJCSE), Vol. 2, No. 4, 2011, pp. 566-574.
 R. Landauer, “Irreversibility and Heat Generation in the Computational Process,” IBM Journal of Research and Development, Vol. 5, No. 3, 1961, pp. 183-191.
 M. Mohammadi and M. Eshghi, “On Figureures of Merit in Reversible and Quantum Logic Designs,” Quantum Information Processing, Vol. 8, No. 4, 2009, pp. 297-318.
 D. Maslov and G. W. Dueck, “Improved Quantum Cost for n-Bit Toffoli Gates,” IEEE Electronics Letters, Vol. 39, No. 25, 2003, pp. 1790-1791.
 R. Feynman, “Quantum Mechanical Computers,” Optic News, Vol. 11, 1985, pp. 11-20.
 E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoretical Physics, Vol. 21, No. 3-4, 1982, pp. 219-253.
 H. G. Rangaraju, V. Hegde, K. B. Raja and K. N. Muralidhara, “Design of Efficient Reversible Binary Comparator,” International Conference on Communication Technology and System Design, 7-9 December 2011.
 H. R. Bhagyalakshmi and M. K. Venkatesha, “Design of a Multifunction BVMF Reversible Logic Gate and Its Applications,” International Journal of Computer Applications (0975-8887), Vol. 32, No. 3, 2011.