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 WET  Vol.2 No.1 , January 2011
Capacitive Model and S-Parameters of Double-Pole Four-Throw Double-Gate RF CMOS Switch
Abstract: In this paper, we have analyzed the Double-Pole Four-Throw Double-Gate Radio-Frequency Complementary Metal-Oxide-Semiconductor (DP4T DG RF CMOS) switch using S-parameters for 1 GHz to 60 GHz of frequency range. DP4T DG RF CMOS switch for operation at high frequency is also analyzed with its capacitive model. The re-sults for the development of this proposed switch include the basics of the circuit elements in terms of capacitance, re-sistance, impedance, admittance, series equivalent and parallel equivalent of this network at different frequencies which are present in this switch whatever they are ON or OFF.
Cite this paper: nullV. Srivastava, K. Yadav and G. Singh, "Capacitive Model and S-Parameters of Double-Pole Four-Throw Double-Gate RF CMOS Switch," Wireless Engineering and Technology, Vol. 2 No. 1, 2011, pp. 15-22. doi: 10.4236/wet.2011.21003.
References

[1]   S. K. Saha, “Modeling Process Variability in Scaled CMOS Technology,” IEEE Journal of Design and Test of Computers, Vol. 27, No. 2, 2010, pp. 8-16. doi:10.1109/ MDT.2010.50

[2]   T. Manku, “Microwave CMOS Device Physics and Design,” IEEE Journal of Solid State Circuits, Vol. 34, No. 3, 1999, pp. 277-285. doi:10.1109/4.748178

[3]   P. Mekanand, P. Prawatrungruang and D. Eungdamrong, “0.5 μ CMOS 2.4 GHz RF Switch for Wireless Communications,” Proceedings of 10th International Conference on Advanced Communication Technology, Phoenix Park, 17-20 February 2008, pp. 447-450. doi:10.1109/ICACT.2008.4493799

[4]   V. M. Srivastava, K. S. Yadav and G. Singh, “Application of VEE Pro Software for Measurement of MOS Device Parameter Using C-V Curve,” International Journal of Computer Applications, Vol. 1, No. 7, 2010, pp. 43-46. doi:10.5120/164-289

[5]   A. Litwin and A. B. Stockholm, “Overlooked Interfacial Silicide-Polysilicon Gate Resistance in MOS Transistors,” IEEE Transactions on Electron Devices, Vol. 48, No. 9, 2001, pp. 2179-2181. doi:10.1109/16.944214

[6]   V. M. Srivastava, K. S. Yadav and G. Singh, “Measurement of Oxide Thickness for MOS Devices, Using Simulation of SUPREM Simulator,” International Journal of Computer Applications, Vol. 1, No. 6, 2010, pp. 66-70. doi:10.5120/141-260

[7]   V. M. Srivastava, “Relevance of VEE Programming for Measurement of MOS Device Parameters,” Proceedings of IEEE International Advance Computing Conference, Patiala, 6-7 March 2009, pp. 205-209.

[8]   Y. Ye and Y. Cao, “Random Variability Modeling and Its Impact on Scaled CMOS Circuits,” Journal of Computational Electronics, Vol. 9, No. 3-4, 2010, pp. 108-113. doi:10.1007/s10825-010-0336-5

[9]   R. H. Caverly, S. Smith and J. Hu, “RF CMOS Cells for Wireless Applications,” Journal of Analog Integrated Circuits and Signal Processing, Vol. 25, No. 1, 2001, pp. 5-15. doi:10.1023/A:1008365816788

[10]   V. M. Srivastava, K. S. Yadav and G. Singh, “Designing Parameters for RF CMOS Cells,” International Journal of Circuits and Systems, Vol. 1, No. 2, 2010, pp. 49-53. doi:10.4236/cs.2010.12008

[11]   O. Moldovan, F. A. Chaves, B. Iniguez, et al., “Accurate Prediction of the Volume Inversion Impact on Undoped Double-Gate MOSFET Capacitances,” International Journal of Numerical Modeling, Electronic Networks, Devices and Fields, Vol. 23, No. 6, 2010, pp. 447-457. doi:10.1002/jnm.745

[12]   F. J. Huang, “A 0.5 μm CMOS T/R Switch For 900 MHz Wireless Applications,” IEEE Journal of Solid-State Circuits, Vol. 36, No. 3, 2001, pp. 486–492. doi:10.1109/4.910487

[13]   H. Hamed, S. Kaya and J. Starzyk, “Use of Nano-Scale Double-Gate MOSFETs in Low Power Tunable Current Mode Analog Circuits,” Journal of Analog Integrated Circuits, Signal Processing, Vol. 54, No. 3, 2008, pp. 211-217. doi:10.1007/s10470-008-9134-4

[14]   V. M. Srivastava, K. S. Yadav and G. Singh, “Double-Pole Four-Throw Switch Design with CMOS Inverter,” Proceeding of 5th IEEE International Conference on Wireless Communication and Sensor Network, Allahabad, 15-19 December 2009, pp. 1-4. doi:10.1109/WCSN.2009.5434786

[15]   A. V. Garcia, S. Reynolds and J. O. Plouchartv, “60 GHz Transmitter Circuits in 65 nm CMOS,” Radio Frequency Integrated Circuits Symposium, 2008, pp. 641-644. doi: 10.1109/RFIC.2008.4561519

[16]   S. H. Lee, C. S. Kim and H. K. Yu, “A Small Signal RF Model and Its Parameter Extraction for Substrate Effects in RF MOSFETs,” IEEE Transaction on Electron Devices, Vol. 48, No. 7, 2001, pp. 1374-1379. doi:10.110 9/16.930654

[17]   S. Sharma and P. Kumar, “Non Overlapped Single and Double-Gate SOI/GOI MOSFET for Enhanced Short Channel Immunity,” Journal of Semiconductor Technology and Science, Vol. 9, No. 3, 2009, pp. 136-147.

[18]   S. Kang and Y. Leblebici, “CMOS Digital Integrated Circuits Analysis and Design,” 3rd Edition, McGraw Hill, New York, 2002.

[19]   T. H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits,” 2nd Edition, Cambridge University Press, New York, 2004.

[20]   R. Baker, H. Li and D. Boyce, “CMOS Circuit Design, Layout, and Simulation,” 3rd Edition, IEEE Press Series on Microelectronic Systems, USA, 2010.

[21]   Y. Cheng and M. Matloubian, “Frequency Dependent Resistive and Capacitive Components in RF MOSFETs,” IEEE Electron Device Letters, Vol. 22, No. 7, 2001, pp. 333-335.

[22]   J. P. Carmo, P. M. Mendes, C. Couto and J. H. Correia “A 2.4 GHz RF CMOS Transceiver for Wireless Sensor Applications,” Proceeding of International Conference on Electrical Engineering, Coimbra, 7-10 October 2005, pp. 902-905.

[23]   V. M. Srivastava, K. S. Yadav and G. Singh, “Design and Performance Analysis of Double-Gate MOSFET over Single-Gate MOSFET for RF Switch,” Journal of Microelectronics, in press, 2010. doi:10.1016/j.mejo.2010. 12.007

[24]   Y. Cheng and M. Matloubian, “Parameter Extraction of Accurate and Scalable Substrate Resistance Components in RF MOSFETs,” IEEE Electron Device Letters, Vol. 23, No. 4, 2002, pp. 221-223. doi:10.1109/55.992845

[25]   P. H. Woerlee, “RF CMOS Performance Trends,” IEEE Transaction on Electron Devices, Vol. 48, No. 8, 2001, pp. 1776-1782. doi:10.1109/16.936707

[26]   V. M. Srivastava, K. S. Yadav and G. Singh, “Double- Pole Four-Throw CMOS Switch Design With Double-Gate Transistor,” 2010 Annual IEEE India Conference, Kolkata, 17-19 December 2010, in press.

[27]   C. Ta, E. Skafidas and R. Evans, “A 60-GHz CMOS Transmit/Receive Switch,” IEEE Radio Frequency Integrated Circuits Symposium, Hawaii, 3-5 June 2007, pp. 725-728. doi:10.1109/RFIC.2007.380985

 
 
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