A hardware simulator reproduces the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The simulator can be used for LTE and WLAN 802.11ac applications, in indoor and outdoor environments. In this paper, the input signals parameters and the relative power of the impulse responses are related to the relative error and SNR of the output signals. After analyzing the influence of these parameters on the output error and SNR, an algorithm based on an Auto-Scale Factor (ASF) is analyzed in details to improve the precision of the output signals of the hardware simulator digital block architecture. Moreover, the circuit needed for the validation of this algorithm has been introduced, verified and realized. It is shown that this solution increases the output SNR if the relative powers of the impulse responses are attenuated. The new architecture of the digital block is presented and implemented on a Xilinx Virtex-IV FPGA. The occupation on the FPGA and the accuracy of the architecture are analyzed.
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