A Modified Approach for CMOS Auto-Zeroed Offset-Stabilized Opamp

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In this paper, a very low-offset continuous time amplifier has been presented. It has the fully differential structure and uses an Auto-zeroed offset stabilization technique. This structure consists of two phases in which the offset value is sampled in the first phase and then subtracted from the signal in the second phase. In order to maintain the continuous time topology, the amplifier uses two paths called main-path and sub-path where the main-path is never disconnected from the signal path and as a result the structure will be continuous time. The amplifier is designed to have a total amount of power dissipation about 3 mW in the standard 0.35 μm CMOS process. Furthermore, the proposed Opamp has an offset value lower than 1 μV at a 2.5 kHz Auto-zeroing frequency, unity gain frequency of 6.14 MHz and phase margin of 78.6° with 50 pF loads.

References

[1] C. C. Enz and G. C. Temes, “Circuit Techniques for Reducing the Effects of Opamp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization,” Proceedings of the IEEE-PIEEE, Vol. 84, No. 11, 1996, pp. 1584-1614. doi:10.1109/5.542410

[2] C. G. Yu and R. L. Geiger, “An Automatic Offset Compensation Scheme with Ping-Pong Control for CMOS Operational Amplifiers,” IEEE Journal of Solid-State Circuits, Vol. 29, 1994, pp. 601-610.

[3] M. A. P. Pertijs and W. J. Kindt, “A 140 dB-CMRR Current-Feedback Instrumentation Amplifier Employing Ping Pong Auto-Zeroing and Chopping,” IEEE Journal of Solid-State Circuits, Vol. 45, No. 10, 2010, pp. 2044-2056. doi:10.1109/JSSC.2010.2060253

[4] A. Bakker, K. Thiele and J. H. Huijsing, “A CMOS Nested-Chopper Instrumentation Amplifier with 100-nV Offset,” IEEE Journal of Solid-State Circuits, Vol. 35, No. 12, 2000, pp. 1877-1883. doi:10.1109/4.890300

[5] C. Menolfi and Q. Huang, “A Fully Integrated CMOS Instrumentation Amplifier with Submicrovolt Offset,” IEEE Journal of Solid-State Circuits, Vol. 34, No. 3, 1999, pp. 415-420. doi:10.1109/4.748194

[6] M. C. W. Coln, “Chopper Stabilization of MOS Operational Amplifiers Using Feed-Forward Techniques,” IEEE Journal of Solid-State Circuits, Vol. SC-16, No. 6, 1981, pp. 745-748. doi:10.1109/JSSC.1981.1051671

[7] J. F. Witte, J. H. Huijsing and K. A. A. Makinwa, “A Chopper and Auto-Zero Offset-Stabilized CMOS Instrumentation Amplifier,” Symposium on VLSI Circuits Digest of Technical Papers, 2009, pp. 210-211.

[8] H. Scmicond, “ICL7650S Super Chopper-Stabilized Op erational Amplifier,” Linear & Telecom IC’s for Analog Signal Processing Applications Data Book, 1991, pp. 3-526-3-536.

[9] J. F. Witte, K. A. A. Makinwa and J. H. Huijsing, “A CMOS Chopper Offset-Stabilized Opamp,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 7, 2007, pp. 1529-1537. doi:10.1109/JSSC.2007.899080

[10] R. Burt and J. Zhang, “A Micropower Chopper-Stabilized Operational Amplifier Using SC Notch Filter with Synchronous Integration inside the Continuous-Time Signal Path,” IEEE Journal of Solid-State Circuits, Vol. 41, No. 12, 2006, pp. 2729-2736. doi:10.1109/JSSC.2006.884195

[11] I. G. Finvers, J. W. Haslett and F. N. Trofimcnkofl, “A High Temperature Precision Amplifier,” IEEE Journal of Solid-State Circuits, Vol. 30, No. 2, 1995, pp. 120-128.
doi:10.1109/4.341738

[12] B. Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, New York, 2000.

[13] A. T. K. Tang “A 3 μV-Offset Operational Amplifier with 20 nV/√Hz Input Noise PSD at DC Employing Both Chopping and Autozeroing,” IEEE International Solid State Circuits Conference on Digest of Technical Papers, Vol. 1, 2002, pp. 386-387.

[14] F. S. H. K. Embabi and E. S. Cinencio, “Low Voltage Class AB Buffer with Quiescent Current Control,” Journal of Solid-State Circuits, Vol. 33, No. 6, 1998, pp. 915-920. doi:10.1109/4.678659

[15] D. A. Johlns and K. Martin, “Analog Integrated Circuit Design,” John Wiley & Sons, Hoboken, 1997.