Behavioral Modeling and Simulation of Cascade Multibit ΣΔ Modulator for Multistandard Radio Receiver

Affiliation(s)

Information Technologies and Electronics Laboratory National Engineering School of Sfax, Sfax, Tunisia.

Electronics and Communications Department, Telecom ParisTech, Paris, France.

Information Technologies and Electronics Laboratory National Engineering School of Sfax, Sfax, Tunisia.

Electronics and Communications Department, Telecom ParisTech, Paris, France.

ABSTRACT

In* *this paper, a cascade Sigma-Delta (ΣΔ) Analog to Digital Converter (ADC) for multistandard radio receiver was presented. This converter is supposed to be able to support GSM, UMTS, Wifi and WiMAX communication standards. The Sigma-Delta modulator makes use of 4 bit quantizer and Data-Weighted-Averaging (DWA) technique to attain high linearity over a wide bandwidth. A top-down design methodology was adopted to provide a reliable tool for the design of reconfigurable high-speed ΣΔMs. VHDL-AMS language was used to model the analog and mixed parts of the selected 2-1-1 cascade ΣΔ converter and to verify their reconfiguration parameters based on behavioural simulation. This multistandard architecture was high level sized to adapt the modulator performance to the different standards requirements. The effects of circuit non-idealities on the modulator performance were modeled and analyzed in VHDLAMS to extract the required circuit parameters.

Cite this paper

S. Zouari, H. Daoud, M. Loulou, P. Loumeau and N. Masmoudi, "Behavioral Modeling and Simulation of Cascade Multibit ΣΔ Modulator for Multistandard Radio Receiver,"*Circuits and Systems*, Vol. 4 No. 1, 2013, pp. 67-74. doi: 10.4236/cs.2013.41011.

S. Zouari, H. Daoud, M. Loulou, P. Loumeau and N. Masmoudi, "Behavioral Modeling and Simulation of Cascade Multibit ΣΔ Modulator for Multistandard Radio Receiver,"

References

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[2] P. B. Kenington and L. Astier, “Power Consumption of A/D Converters for Software Radio Applications,” IEEE Transactions on Vehicular Technology, Vol. 49, No. 2, 2000, pp. 643-650. doi:10.1109/25.832996

[3] Z. Ru, N. A. Moseley, E. Klumperink and B. Nauta, “Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference”, IEEE Journal of Solid-State Circuits, Vol. 44, No. 12, 2009, pp. 3359-3375. doi:10.1109/JSSC.2009.2032272

[4] B. Razavi, “Cognitive Radio Design Challenges and Techniques”, IEEE Journal of Solid-State Circuits, Vol. 45, No. 8, 2010, pp. 1542-1553. doi:10.1109/JSSC.2010.2049790

[5] R. Bagheri, A. Mirzaei, M. E. Heidari, S. Chehrazi, M. Lee, M. Mikhemar, W. K. Tang and A. A. Abidi, “Software-Defined Radio Receiver: Dream to Reality,” IEEE Communications Magazine, Vol. 44, No. 8, 2006, pp. 111-118. doi:10.1109/MCOM.2006.1678118

[6] A. Silva, J. Guilherme and N. Horta, “Reconfigurable Multi-Mode Sigma-Delta Modulator for 4G Mobile Terminals,” Integration, the VLSI Journal, Vol. 42, No. 1, 2009, pp. 34-46.

[7] M. Miller and C. Petrie, “A Multibit Sigma Delta ADC for Multimode Receivers,” IEEE Journal of Solid State Circuits, Vol. 38, No. 3, 2003, pp. 475-482. doi:10.1109/JSSC.2002.808321

[8] F. Medeiro, B. Pérez-Verdú and A. Rodríguez-Vázquez, “Top-Down Design of High-Performance Sigma-Delta Modulators,” Kluwer Academic Publishers, Boston, 1999, p. 312.

[9] A. A. Abidi, “The Path to the Software-Defined Radio Receiver,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 5, 2007, pp. 954-966. doi:10.1109/JSSC.2007.894307

[10] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “Analogbaseband Channel for Reconfigurable Multistandard (GSM/UMTS/WLAN/Bluetooth) Receivers,” Proceedings of the WIRTEP, Rome, April 2006, pp. 88-92.

[11] M. Brandolini, P. Rossi, D. Manstretta and F. Svelto, “Toward Multistandard Mobile Terminals—Fully Integrated Receivers Requirements and Architectures,” IEEE Transactions on Microwave Theory and Techniques, Vol. 53, No. 3, 2005, pp. 1026-1038. doi:10.1109/TMTT.2005.843505

[12] R. del Río, F. Medeiro, J. M. de la Rosa, B. Pérez-Verdú and A. Rodríguez-Vázquez, “A 2.5 V CMOS Wideband Sigma-Delta Modulator,” IEEE Instrumentation and Measurement Technology Conference, Vail Colorado, May 2003, pp. 224-228.

[13] A. Silva, J. Guilherme and N. HortaCir, “A Reconfigurable Sigma-Delta Modulator Reconfiguration of Cascade Sigma Delta Modulators for Multistandard GSM/Bluetooth/UMTS/WLAN Transceivers,” IEEE International Symposium on Integration Circuits and Systems, ISCAS, Island of Kos, 21-24 May 2006, pp. 1884-1887.

[14] J. Marttila, M. Allén and M. Valkama, “Design and Analysis of Multi-Stage Quadrature Sigma-Delta A/D Converter for Cognitive Radio Receivers,” Proceedings of the 16th IEEE International Workshop on Computer-Aided Modeling Analysis and Design of Communication Links and Networks, Kyoto, 10-11 June 2011, pp. 10-11.

[15] A. Morgado, R. del Río and J. M. de la Rosa, “Design of a 130-nm CMOS Reconfigurable Cascade ΣΔ Modulator for GSM/UMTS/Bluetooth,” IEEE International Symposium on Circuits and Systems, ISCAS, Island of Kos, 27-30 May 2007, pp. 725-728.

[16] S. zouari, et al., “High Order Cascade Multibit Sigma Delta Modulator for Wide Bandwidth Applications,” International Journal of Electronic Commerce Studies, Vol. 1, No. 1, 2007, pp. 60-66.

[17] H. Daoud, S. Bennour, S. Ben Salem and M. Loulou, “Low Power SC CMFB Folded Cascode OTA Optimiztion,” The IEEE International Conference on Electronics, Circuits, and Systems, St. Julien, 31 August-3 September 2008, pp. 570-573.

[18] R. Schreier, J. Silva, J. Steensgaard and G. C. Temes “Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits,” IEEE Transactions on Circuits and Systems: Regular Papers, Vol. 52, 2005, pp. 2358-2368.

[19] Y. Yin, H. Klar and P. Wennekers, “A Cascade 3-1-1 Multibit ΣΔ Modulator with Reduced Sensitities to Non-Idealities,” The IEEE International Symposium on Circuits and Systems, Vol. 4, 2005, pp. 3087-3090.

[20] Y. B. N. Kumar, S. Talay and F. Maloberti, “Complex Cascaded Bandpass ΣΔ ADC Design,” Proceedings of the IEEE International Symposium on Circuits and Systems, Taipei, 24-27 May 2009, pp. 3118-3121.

[21] Van Tam, “VHDL-AMS Behavioral Modelling and Simulation of High-Pass Delta-Sigma Modulator,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 50, No. 3, 2005, pp. 352-364.

[22] P. Malcovati, S. Brigati, F. Francesconi, F. Maloberti, P. Cusinato and A. Baschirotto, “Behavioral Modeling of Switched-Capacitor Sigma-Delta Modulators,” IEEE International Symposium on Circuits and Systems, Vol. 50, 2003, pp. 352-364.

[1] P.-I. Mak, U. Seng-Pan and R. P. Martins, “Transceiver Architecture Selection: Review, State-of-the-Art Survey and Case Study,” IEEE Circuits and Systems Magazine, Vol. 7, No. 2, 2007, pp. 6-25. doi:10.1109/MCAS.2007.4299439

[2] P. B. Kenington and L. Astier, “Power Consumption of A/D Converters for Software Radio Applications,” IEEE Transactions on Vehicular Technology, Vol. 49, No. 2, 2000, pp. 643-650. doi:10.1109/25.832996

[3] Z. Ru, N. A. Moseley, E. Klumperink and B. Nauta, “Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference”, IEEE Journal of Solid-State Circuits, Vol. 44, No. 12, 2009, pp. 3359-3375. doi:10.1109/JSSC.2009.2032272

[4] B. Razavi, “Cognitive Radio Design Challenges and Techniques”, IEEE Journal of Solid-State Circuits, Vol. 45, No. 8, 2010, pp. 1542-1553. doi:10.1109/JSSC.2010.2049790

[5] R. Bagheri, A. Mirzaei, M. E. Heidari, S. Chehrazi, M. Lee, M. Mikhemar, W. K. Tang and A. A. Abidi, “Software-Defined Radio Receiver: Dream to Reality,” IEEE Communications Magazine, Vol. 44, No. 8, 2006, pp. 111-118. doi:10.1109/MCOM.2006.1678118

[6] A. Silva, J. Guilherme and N. Horta, “Reconfigurable Multi-Mode Sigma-Delta Modulator for 4G Mobile Terminals,” Integration, the VLSI Journal, Vol. 42, No. 1, 2009, pp. 34-46.

[7] M. Miller and C. Petrie, “A Multibit Sigma Delta ADC for Multimode Receivers,” IEEE Journal of Solid State Circuits, Vol. 38, No. 3, 2003, pp. 475-482. doi:10.1109/JSSC.2002.808321

[8] F. Medeiro, B. Pérez-Verdú and A. Rodríguez-Vázquez, “Top-Down Design of High-Performance Sigma-Delta Modulators,” Kluwer Academic Publishers, Boston, 1999, p. 312.

[9] A. A. Abidi, “The Path to the Software-Defined Radio Receiver,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 5, 2007, pp. 954-966. doi:10.1109/JSSC.2007.894307

[10] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “Analogbaseband Channel for Reconfigurable Multistandard (GSM/UMTS/WLAN/Bluetooth) Receivers,” Proceedings of the WIRTEP, Rome, April 2006, pp. 88-92.

[11] M. Brandolini, P. Rossi, D. Manstretta and F. Svelto, “Toward Multistandard Mobile Terminals—Fully Integrated Receivers Requirements and Architectures,” IEEE Transactions on Microwave Theory and Techniques, Vol. 53, No. 3, 2005, pp. 1026-1038. doi:10.1109/TMTT.2005.843505

[12] R. del Río, F. Medeiro, J. M. de la Rosa, B. Pérez-Verdú and A. Rodríguez-Vázquez, “A 2.5 V CMOS Wideband Sigma-Delta Modulator,” IEEE Instrumentation and Measurement Technology Conference, Vail Colorado, May 2003, pp. 224-228.

[13] A. Silva, J. Guilherme and N. HortaCir, “A Reconfigurable Sigma-Delta Modulator Reconfiguration of Cascade Sigma Delta Modulators for Multistandard GSM/Bluetooth/UMTS/WLAN Transceivers,” IEEE International Symposium on Integration Circuits and Systems, ISCAS, Island of Kos, 21-24 May 2006, pp. 1884-1887.

[14] J. Marttila, M. Allén and M. Valkama, “Design and Analysis of Multi-Stage Quadrature Sigma-Delta A/D Converter for Cognitive Radio Receivers,” Proceedings of the 16th IEEE International Workshop on Computer-Aided Modeling Analysis and Design of Communication Links and Networks, Kyoto, 10-11 June 2011, pp. 10-11.

[15] A. Morgado, R. del Río and J. M. de la Rosa, “Design of a 130-nm CMOS Reconfigurable Cascade ΣΔ Modulator for GSM/UMTS/Bluetooth,” IEEE International Symposium on Circuits and Systems, ISCAS, Island of Kos, 27-30 May 2007, pp. 725-728.

[16] S. zouari, et al., “High Order Cascade Multibit Sigma Delta Modulator for Wide Bandwidth Applications,” International Journal of Electronic Commerce Studies, Vol. 1, No. 1, 2007, pp. 60-66.

[17] H. Daoud, S. Bennour, S. Ben Salem and M. Loulou, “Low Power SC CMFB Folded Cascode OTA Optimiztion,” The IEEE International Conference on Electronics, Circuits, and Systems, St. Julien, 31 August-3 September 2008, pp. 570-573.

[18] R. Schreier, J. Silva, J. Steensgaard and G. C. Temes “Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits,” IEEE Transactions on Circuits and Systems: Regular Papers, Vol. 52, 2005, pp. 2358-2368.

[19] Y. Yin, H. Klar and P. Wennekers, “A Cascade 3-1-1 Multibit ΣΔ Modulator with Reduced Sensitities to Non-Idealities,” The IEEE International Symposium on Circuits and Systems, Vol. 4, 2005, pp. 3087-3090.

[20] Y. B. N. Kumar, S. Talay and F. Maloberti, “Complex Cascaded Bandpass ΣΔ ADC Design,” Proceedings of the IEEE International Symposium on Circuits and Systems, Taipei, 24-27 May 2009, pp. 3118-3121.

[21] Van Tam, “VHDL-AMS Behavioral Modelling and Simulation of High-Pass Delta-Sigma Modulator,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 50, No. 3, 2005, pp. 352-364.

[22] P. Malcovati, S. Brigati, F. Francesconi, F. Maloberti, P. Cusinato and A. Baschirotto, “Behavioral Modeling of Switched-Capacitor Sigma-Delta Modulators,” IEEE International Symposium on Circuits and Systems, Vol. 50, 2003, pp. 352-364.