ENG  Vol.4 No.7 , July 2012
Steady State Temperature Study on RF LDMOS with Structure Modification
Abstract: This paper is devoted to temperature analysis on power RF LDMOS with different feature parameters of die thickness, pitch S length and finger width. The significance of these three parameters is determined from temperature comparison obtained by 3D Silvaco-Atlas device simulator. The first three simulations focus on temperature variation with the three factors at different output power density respectively. The results indicate that both the thinner die thickness and the broaden pitch S length have distinct advantages over the shorter finger width. The device, at the same time, exhibits higher temperature at a larger output power density. Simulations are further carried out on structure with combination of different pitch s length and die thickness at a large 1W/mm output power density and the temperature reduction reaches as high as 55%.
Cite this paper: X. Sun, H. Wu, Q. Chen and H. Gao, "Steady State Temperature Study on RF LDMOS with Structure Modification," Engineering, Vol. 4 No. 7, 2012, pp. 379-383. doi: 10.4236/eng.2012.47049.

[1]   M. A. Belaid, K. Ketata, K. Mourgues, H. Maamame, M. Masmoudi and J. Marcon, “Comparative Analysis of Accelerated Ageing Effects on Power RF LDMOS Reliability,” Proceedings of the 16th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, September-November 2005, pp. 1732-1737.

[2]   M. A. Belaid, K. Ketata, K. Mourgues, M. Gares, M Masmoudi and J. Marcon, “Reliability Study of Power RF LDMOS Device under Thermal Stress,” Microelectronics Journal, Vol. 38, No. 2, 2007, pp. 164-170. doi:10.1016/j.mejo.2006.08.004

[3]   S. Y. Chen and J. S. Yuan, “Adaptive Gate Bias for Power Amplifier Temperature Compensation,” IEEE Transactions on Device and Materials Reliability, Vol. 11, No. 3, 2011, pp. 442-448. doi:10.1109/TDMR.2011.2160264

[4]   S. Boumaiza, “Thermal Memory Effects Modeling and Compensation in RF Power Amplifiers and Predistortion Lineaizers,” IEEE Transactions on Microwave Theory and Techniques, Vol. 51, No. 12, 2003, pp. 2427-2433. doi:10.1109/TMTT.2003.820157

[5]   Y. Takahashi, R. Ishikawa and K. Honjo, “Precise Modeling of Thermal Memory Effect for Power Amplifier using Multi-stage Thermal RC-ladder Network,” Asia Pacific Microwave Conference, 12-15 December 2006, pp. 287-290.

[6]   J. A. Herbsommer, H. Safar, W. Brown, P. Gammel, O. Lopez and G. Terefenko, “Improved Electrical and Thermal Performance of Ultra-Thin RF LDMOS Power Transistors,” Microwave Symposium Digest, 2003 IEEE MTT-S International, 8-13 June 2003, pp. 213-216.

[7]   J. Roig, D. Flores, J Urresti, S Hidalgo and J Rebollo, “Modeling of Non-Uniform Heat Generation in LDMOS Transistors,” Solid State Electronics, Vol. 49, No. 1, 2005, pp. 77-85. doi:10.1016/j.sse.2004.06.016

[8]   Y. C. Gerstenmaier, A. Castellzzi and G. K. M. Wachutka, “Electrothermal Simulation of Multichip Modules with Novel Transient Thermal Model and Time-Dependent Boundary Conditions,” IEEE Transactions on Power Electronics, Vol. 21, No. 1, 2006, pp. 45-55. doi:10.1109/TPEL.2005.861116

[9]   A. Ramman, D. G. Waller and T. S. Fisher, “Simulation of Nonequilibrium Thermal Effects in Power LDMOS Transistors,” Solid State Electronics, Vol. 47, No. 8, 2003, pp. 1265-1273. doi:10.1016/S0038-1101(03)00066-2

[10]   J. H. K. Vuolevi, T. Rahkonen and J. P. A. Mannien, “Measurement Technique for Characterizing Memory Effects in RF Power Amplifiers,” IEEE Transactions on Microwave Theory and Techniques, Vol. 49, No. 8, 2001, pp. 1383-1389. doi:10.1109/22.939917