Design and Analysis of a Power Efficient Linearly Tunable Cross-Coupled Transconductor Having Separate Bias Control

ABSTRACT

A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD_{3}) poorly. Separate current sources are shown to provide better control on HD_{3}) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high G_{m}, low power dissipation and is designed for linearly tunable G_{m} with current mode load as one of the applications. The circuit exhibits HD_{3}) of less than –43.7 dB, high current efficiency of 1.18 V^{-1} and G_{m} of 390 μS at 1 VG_{p-p} @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.

A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD

Cite this paper

V. Bhadauria, K. Kant and S. Banerjee, "Design and Analysis of a Power Efficient Linearly Tunable Cross-Coupled Transconductor Having Separate Bias Control,"*Circuits and Systems*, Vol. 3 No. 1, 2012, pp. 99-106. doi: 10.4236/cs.2012.31013.

V. Bhadauria, K. Kant and S. Banerjee, "Design and Analysis of a Power Efficient Linearly Tunable Cross-Coupled Transconductor Having Separate Bias Control,"

References

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[19] K. Kuo and A. Leuciuc, “A Linear MOS Transconductor Using Source Degeneration and Adaptive Biasing,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 48, No. 10, 2001, pp. 937-943. doi:10.1109/82.974782

[20] S. H. Yang, K. H. Kim, Y. You and K. R. Cho, “A Novel CMOS Operational Transconductance Amplifier Based on Mobility Compensation Technique,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52, No. 1, 2005, pp. 37- 42. doi:10.1109/TCSII.2004.839539

[21] S. Koziel and S. Szczepanski, “Design of Highly Linear Tunable CMOS OTA for Continuous-Time Filters,” IEEE Transactions on Circuits and System-II Analog and Digital Signal Processing, Vol. 49, No. 2, 2002, pp. 110-122. doi:10.1109/TCSII.2002.1002513

[22] A. A. Fayed and M. Ismail, “A Low Voltage, Highly Linear Voltage-Controlled Transconductor,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52 No. 12, 2005, pp. 831-835. doi:10.1109/TCSII.2005.853511

[23] V. Bhadauria and K. Kant, “A Novel Technique for Tuning Low Voltage Linear Transconductor,” 2010 International Conference on Electronic Devices, System and Application (ICEDSA2010), 12-13 April 2010, Kuala Lumpur, Malaysia, pp. 22-25. doi:10.1109/ICEDSA.2010.5503108

[24] V. Bhadauria K. Kant and S. Banerjee, “A Tunable Transconductor With High Linearity,” Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS 2010), Kuala Lumpur, 6-9 December 2010, pp. 5-8. doi:10.1109/APCCAS.2010.5774749

[25] P. Bruschi, F. Sebastiano and N. Nizza, “CMOS Transconductors with Nearly Constant Input Ranges over wide Tuning Intervals,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 53, No. 10, 2006, pp. 1002-1006. doi:10.1109/TCSII.2006.882126

[26] R. J. Baker, “CMOS Circuit Design, Layout, and Simulation,” IEEE Press, Wiley-Interscience, A John Wiley & sons, Inc., Publication, New York, 2005, Chapter 9, p. 291.

[1] B. Razavi, “Design of Analog CMOS Integrated Circuits,” Tata McGraw-Hill Publishing Company Limited, 2002.

[2] D. A. Johns and K. Martin, “Analog Integrated Circuit Design,” John Wiley and Sons, New York, 1997.

[3] P. E. Allen and D. R. Holberg, “CMOS Analog Circuit Design,” Oxford University Press, New York, 2004.

[4] E. Sánchez-Sinencio and J. Silva-Martínez, “CMOS Transconductance Amplifiers, Architectures and Active Filters: A Tutorial,” IEE Proceedings Circuits, Devices & Systems, Vol. 147, No. 1, 2000, pp. 3-12. doi:10.1049/ip-cds:20000055

[5] J. Y. Kim and R. L. Geiger, “Characterisation of Linear MOS Active Attenuator and Amplifier,” Electronic Letters, Vol. 31, 1995, pp. 511-513. doi:10.1049/el:19950353

[6] X. Zhang and E. I. El-Masry, “A Novel CMOS OTA Based on Body-Driven MOSFETs and Its Applications in OTA-C Filters,” IEEE Transactions on Circuits and System-I Regular Papers, Vol. 54, No. 6, 2007, pp. 1204-1211. doi:10.1109/TCSI.2007.897765

[7] J. Chen, E. Sanchez-Sinencio and J. Silva-Martinez, “Frequency Dependent Harmonic Distortion Analysis of a Linearized cross Coupled CMOS OTA and Its Application to OTA C-Filter,” IEEE Transactions on Circuits and System-I Regular Papers, Vol. 53, No. 3, 2006, pp. 499-510. doi:10.1109/TCSI.2005.859575

[8] Z. Wang and W. Guggenbuhl, “A Voltage-Controlled Linear MOS Transconductor Using Bias Offset Technique,” IEEE Journal of Solid-State Circuits, Vol. 25, 1990, pp. 315-317. doi:10.1109/4.50321

[9] Y. Sun, C. Hill and S. Szczepanski, “Large Dynamic Range High Frequency Fully Differential CMOS Transconductance Amplifier,” Analog Integrated Circuits and Signal Processing, Vol. 34, 2003, pp. 247-255.

[10] D. V. Morozov and A. S. Kuroki, “Transconductance Amplifier with Low-Power Consumption,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52, No. 11, 2005, pp. 776-779. doi:10.1109/TCSII.2005.852190

[11] A. Lewinski and J. Silva-Martinez, “OTA Linearity Enhancement Technique for High Frequency Application With IM3 Below-65 dB,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 51, No 10, 2004, pp. 542-548. doi:10.1109/TCSII.2004.834531

[12] S. Ouzounov, E. Roza, H. Hegt, G. V. D. Weide and A. V. Roermund, “Design of MOS Transconductors with Low Noise and Low Harmonic Distortion for Minimum Current Consumption,” Integration, the VLSI Journal, Vol. 40, 2007, pp. 365-379.

[13] F. Krummenacher and N. Joehl, “A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning,” IEEE Journal of Solid-State Circuits, Vol. 23, No. 3, 1988, pp. 750-758. doi:10.1109/4.315

[14] J. Silva-Martinez, M. S. J. Steyaert and W. M. C. Sansen, “A Large-Signal Very Low-Distortion Transconductor for High-Frequency Continuous-Time Filters,” IEEE Journal of Solid-State Circuits, Vol. 26, No. 7, 1991, pp. 946-954. doi:10.1109/4.92014

[15] M. Kachare, Antonio J. Lopez-Martin, J. Ramirez-Angulo, and R. G. Carvajal, “A Compact Tunable CMOS Transconductor with Linearity,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52, No. 2, 2005, pp. 82-84. doi:10.1109/TCSII.2004.842065

[16] W. Huang and E. Sanchez-Sinencio, “Robust Highly- Linear High-Frequency CMOS OTA with IM3 Below-70 dB at 26 MHz,” IEEE Transactions on Circuits and System-I Regular Papers, Vol. 53, No. 7, 2006, pp. 1433-1447. doi:10.1109/TCSI.2006.875187

[17] F. A. P. Baruqui and A. Petraglia, “Linearly Tunable CMOS OTA With Constant Dynamic Range Using Source-Degenerated Current Mirrors,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 53, No. 9, 2006, pp. 797-801. doi:10.1109/TCSII.2006.881162

[18] P. Monsurrò, S. Pennisi, G. Scotti and A. Trifiletti, “Linearization Technique for Source-Degenerated CMOS Differential Transconductors,” IEEE Transactions on Circuits and System-II, Vol. 54, No. 10, 2007, pp. 848-852. doi:10.1109/TCSII.2007.906203

[19] K. Kuo and A. Leuciuc, “A Linear MOS Transconductor Using Source Degeneration and Adaptive Biasing,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 48, No. 10, 2001, pp. 937-943. doi:10.1109/82.974782

[20] S. H. Yang, K. H. Kim, Y. You and K. R. Cho, “A Novel CMOS Operational Transconductance Amplifier Based on Mobility Compensation Technique,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52, No. 1, 2005, pp. 37- 42. doi:10.1109/TCSII.2004.839539

[21] S. Koziel and S. Szczepanski, “Design of Highly Linear Tunable CMOS OTA for Continuous-Time Filters,” IEEE Transactions on Circuits and System-II Analog and Digital Signal Processing, Vol. 49, No. 2, 2002, pp. 110-122. doi:10.1109/TCSII.2002.1002513

[22] A. A. Fayed and M. Ismail, “A Low Voltage, Highly Linear Voltage-Controlled Transconductor,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 52 No. 12, 2005, pp. 831-835. doi:10.1109/TCSII.2005.853511

[23] V. Bhadauria and K. Kant, “A Novel Technique for Tuning Low Voltage Linear Transconductor,” 2010 International Conference on Electronic Devices, System and Application (ICEDSA2010), 12-13 April 2010, Kuala Lumpur, Malaysia, pp. 22-25. doi:10.1109/ICEDSA.2010.5503108

[24] V. Bhadauria K. Kant and S. Banerjee, “A Tunable Transconductor With High Linearity,” Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS 2010), Kuala Lumpur, 6-9 December 2010, pp. 5-8. doi:10.1109/APCCAS.2010.5774749

[25] P. Bruschi, F. Sebastiano and N. Nizza, “CMOS Transconductors with Nearly Constant Input Ranges over wide Tuning Intervals,” IEEE Transactions on Circuits and System-II Express Briefs, Vol. 53, No. 10, 2006, pp. 1002-1006. doi:10.1109/TCSII.2006.882126

[26] R. J. Baker, “CMOS Circuit Design, Layout, and Simulation,” IEEE Press, Wiley-Interscience, A John Wiley & sons, Inc., Publication, New York, 2005, Chapter 9, p. 291.