S. Dongwan, A. Gerstlauer, R. Domer and D. D. Gajski, “An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, No. 4, 2008, pp. 446-475.
 E. Casseau and B. Le Gal, “High-Level Synthesis for the Design of FPGA-Based Signal Processing Systems,” International Symposium on Systems, Architectures, Modeling, and Simulation, SAMOS’09, 20-23 July 2009, pp. 25-32.
 V. Sklyarov and I. Skliarova, “Teaching Reconfigurable Systems: Methods,Tools, Tutorials, and Projects,” IEEE Transactions on Education, Vol. 48, No. 2, 2005, pp. 290-300. doi:10.1109/TE.2004.842909
 P. Avss, S. Prasant and R. Jain, “Virtual Prototyping Increases Productivity—A Case Study,” IEEE International Symposium on VLSI Design, Automation and Test, Hsinchu, 28-30 April 2009, pp. 96-101. doi:10.1109/VDAT.2009.5158104
 P. Schumacher, M. Mattavelli, A. Chirila-Rus and R. Turney, “A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs,” Proceedings of Fifth International Workshop on System-on-Chip for Real- Time Applications, 20-24 July 2005, pp. 30-33. doi:10.1109/IWSOC.2005.27
 S. Van Haastregt and B. Kienhuis, “Automated Synthesis of Streaming C Applications to Process Networks in Hardware,” Proceedings of the Conference on Design Automation & Test in Europe, April 2009, pp. 890-893.
 N. Hatami, A. Ghofrani, P. Prinetto and Z. Navabi, “TLM 2.0 Simple Sockets Synthesis to RTL,” International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Vol. 1, 2000, pp. 232-235.