Photovoltaic energy is used for daily consumption purposes; however, the direct current delivered by the panels must be suitable for the majority of appliances that only operate in alternating current. This transformation is done using photovoltaic inverters. The voltage delivered by the main being about 220 V in West Africa, it would be necessary that the photovoltaic system could deliver as much. Taking into account the losses, we would need a DC voltage of about 300 V from the panels to convert it into a suitable AC voltage. As a result, the number of panels, delivering only 15 - 17 V each on average, to be put in series to obtain the 300 V is quite considerable. As we are in the context of miniaturization and cost minimization, the inverters include DC-DC step-up converters to raise the voltage from the panels to average voltage values.
The low-frequency characterization of the DC-DC converters was carried out in 1972  . The work presented in  can be considered as the first reference to the modeling of DC-DC converters by means of analytical techniques with average continuous time. In the 1990s, the search for a circuit-oriented modeling methodology led to the suggestion of the use of pulse width modulator (PWM-Switch), a three-terminal structure that was the active switch and the diode, the passive switch for most converters  - . Later, a general average state model based on the representation of state variables using Fourier series has been proposed . Reference  proposes the application of this method to resonant and PWM converters, substituting switches with dependent sources.
At the beginning of the 21st century, a systematic method (applicable to all conduction modes) to obtain circuit-oriented average models for multi-output DC-DC converters is presented . One of the main functions of the DC-DC converter is to also allow an impedance matching between the source, which are the panels and the load (user).
That is, there are many works in the field of DC-DC converters with the main objective in renewable energies being high voltage gain with maximum efficiency with reasonable duty cycle  - . In this field, quadratic boost converters are good candidates but there are still some problems to solve: how to minimize losses? How these losses affect the performance of the converter?
Some studies   have highlighted losses due to components; however, the question remains as to the proportion that each of its components has in the total losses.
This work focuses on these problems by studying a Cascaded Connected Single Switch Quadratic Boost (C2S2-QB), particularly the losses in the passive components of the converter. Based on an electrical and mathematical modelling of the converter, the main equations governing the converter are presented and the analytical expressions of the voltage gain and conversion efficiency taking into account losses through passive components are determined.
2. Modeling of the Converter and Mathematical Formulation
The quadratic boost can practically operate in all the possible different modes of conduction according to the values of the duty cycle ratio and the load. The choice of switching into Continuous Conduction Mode (CCM) or Discontinuous Conduction Mode (DCM) has a direct impact on the performance of the power stage and the crossing frequency of the loop.
Also, particular hypotheses can be expected to cope with the analysis of the of discontinuous conduction mode with variable switching frequency. Indeed, the operation in DCM will generally result in a higher loop bandwidth at the expense of less efficiency. The converter sized on the basis of this mode will probably be smaller due to smaller inductances, but the requirements on the capacitance of the output capacitor will be higher .
The Cascaded Connected Single Switch Quadratic Boost (C2S2-QB) is presented in Figure 1.
It consists of a single mosfet transistor which serves as a switch, three diodes D1, D2 and D3, two capacitors C1 and C2, two inductors L1 and L2, and the load resistance R as can be seen in Figure 1.
Assuming that all components are ideal and the converter is operating in Continuous Conduction Mode (CCM)  as this operating mode is more suited for photovoltaic applications, the basic equations are as follows :
When taking into account resistive losses through inductor and capacitor, the boost converter can be presented as shown in Figure 2:
Figure 1. Boost quadratic (C2S2-QB).
Figure 2. Quadratic boost converter with losses through inductor and capacitor (model 1).
The power balance is written as:
are respectively the input power, the output power, the power losses through the inductors series resistance and the power losses through the capacitors series resistance . Expressing the different terms in Equation (5), it can be rewritten in the form:
We can then derive the gain factor G as:
R is the load resistor.
The conversion efficiency η is defined by:
Replacing by their respective expressions, the conversion efficiency becomes:
3. Results and Discussions
Based on the mathematical formulation above, we have been able from Mathcad software to plot different voltage gain and Conversion efficiency versus duty cycle. The simulations were performed by varying duty cycle and series resistances, but choosing transistors and diodes as ideals.
3.1. Voltage Gain Factor
These curves are intended to highlight and appreciate the inductive and capacitive ESR effects on the quadratic boost performance. The internal resistance, whose effect we want to observe, is parameterized with values ranging from 0.02 Ω to 0.1 Ω with a pitch of 0.02. These different values can materialize a progressive deterioration of the component or a use of components of different qualities. However, the values of more than 0.1 Ω are already large enough not to be interested because in practice the use of quality components will be preferred for optimizing the performance of the converter. In the same vein, we will vary the internal resistance of a component assuming that the other components are good qualities, that is to say constant internal resistances and equal to 0.02 Ω .
These figures show that voltage gain factor first increase until a certain duty cycle α0 value from which it began decreasing. In fact, when the duty cycle is increasing the losses in the series resistance of the inductor also increase to a threshold from which the losses are so important that the voltage gain factor begin
Figure 3. Voltage gain factor versus duty cycle for various inductor’s series resistance values. (a) ; (b) .
decreasing for duty cycle approaching unity. We can see that this threshold depend directly on the series resistance value rL. For low rL the threshold is reached very close to duty cycle equal to unity but for increasing rL the threshold is reached far from duty cycle equal to unity. This means that the maximum voltage gain factor (corresponding to a duty cycle α0) is shifted left as rL increases. As losses in the inductor increase, the voltage gain factor decrease very rapidly .
However, we can see that, in Figure 3(a), the difference between the maximum of the curve representing a good quality of L1 and that of the poor quality is about 52.78% which is quite considerable as voltage gain factor losses. While in Figure 3(b) the difference is only about 4.56% between the maximum of the low and high curve. Thus showing that the quality of the inductor L1 has an impact 10 times greater on the voltage gain than that of the inductor L2.
This means that in practical design the value of rL must be absolutely known and small, with L1 priority over L2, otherwise the output voltage could not be guaranteed.
These two figures illustrate the effect of the capacitor series resistance on the voltage gain factor. We can see that the quality of the capacitor C1 has a greater impact in Figure 4(a) than the capacitor C2 in Figure 4(b). In fact, we can loose up to 18.8% of voltage gain factor for a bad quality of the capacitor C1 against 0.64% for a bad quality of the capacitor C2.
That is, the low values of the internal resistances of inductances and capacitors allow us to have a better voltage gain. However, the rL values affect the value of the voltage gain more than the rC values. But different influences are more marked by the values of and the values of ; the variations of impact more than the variations of .
3.2. Conversion Efficiency
The challenges to be raised at the level of the converters being not limited to the voltage gain but also to the yield, let us analyze now the conversion efficiency versus the duty cycle.
This figure shows that as the duty cycle increases, the conversion decrease and this decrease is very marked for duty cycles close to unity if the series resistance rL of the inductor is small. When rL is high, the losses in the inductor prevail as duty cycle increase leading to the observed decrease of the conversion efficiency .
Indeed, we see with the figure that this decrease is very steep for duty cycles close to the unit when the series resistance is weak. When, on the other hand, it is high, the losses in the inductance take precedence over the effects of the duty cycle, resulting in a less gross decrease in conversion efficiency but earlier. However, we can see at the level of the figure that the various curves are barely perceptible thus showing the very low impact that the quality of the L2 inductance has on the conversion efficiency.
Figure 4. Voltage gain factor versus duty cycle for various capacitor’s series resistance values. (a) ; (b) .
Figure 5. Conversion efficiency versus duty cycle for various inductor’s series resistance values. (a) ; (b) .
resistance of the capacitor C2 is smaller than that of the series resistance of the capacitor C1.
As with the voltage gain curves, we see that the values of influence more on the performance followed by those of , then from and then .
For low duty cycle, the gain and efficiency curves are inversely proportional but the effects of the internal resistances of inductances and capacitors are identical. These effects predominate in duty cycle neighboring to the unit to the
Figure 6. Conversion efficiency versus duty cycle for various capacitor’s series resistance values. (a) ; (b) .
point of canceling the values of these different curves.
It would be advisable not to operate at duty cycles greater than 0.8 because the effects of series resistances are more marked in this area. Indeed, working with a duty cycle close to the unit increases the stress of the semiconductors and decreases sharply the life of the converter .
We have presented in this paper a detailed theoretical study of the quadratic boost converter. We have taken into account the real behavior of the passive components of this converter and we have analyzed its voltage gain factor and conversion efficiency. It has been shown that the quality of the passive components of a converter also plays an important role in the quality of the conversion. Indeed, the deterioration of these components over time will cause underperformance of the converter. However, not all passives components affect the converter in the same way. Input inductor L1 must be of the best possible quality as input capacitor C1. The output inductor L2 has little effect on the performance of the converter contrary to L1. Finally, we have the output capacitor C2 that has a very low impact on the voltage gain and on the efficiency but remains important for the quality of the output voltage.
We also show that it is not recommended to use duty cycle close to unity   because losses effects are most important there with a markedly decrease of both voltage gain factor and conversion efficiency. Next steps are dedicated to building a prototype converter for validation purpose and taking into account switching losses.
We would like to express our gratitude to ISP, University of Uppsala, Sweden, for its support of project BUF01.
The RMS values of the currents in the inductances L1 and L2 of this quadratic elevator are respectively and whose expressions are:
and the losses in the inductors are therefore given by:
It is the same for capacitors whose expressions of the currents flowing through them are given by:
The RMS values of the currents are therefore obtained by:
This gives by calculation:
giving by calculation:
Capacitor losses are:
The total power loss of the converter is therefore:
By replacing II with the expression becomes:
This gives a calculated expression of the voltage gain ( ) of the converter with the inductive and capacitive ESR effects.
We obtain the expression of the efficiency of the converter by the relation:
where PLS: designates the overall power loss in the quadratic boost system. PI and P0 designating respectively the input and output powers.
This finally gives:
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